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Vikas Manocha6a12ceb2016-02-11 15:47:19 -08001/*
Patrice Chotard3bc599c2017-10-23 09:53:58 +02002 * Copyright (C) 2016, STMicroelectronics - All Rights Reserved
3 * Author(s): Vikas Manocha, <vikas.manocha@st.com> for STMicroelectronics.
Vikas Manocha6a12ceb2016-02-11 15:47:19 -08004 *
5 * SPDX-License-Identifier: GPL-2.0+
6 */
7
8#include <common.h>
Vikas Manochafd03b832017-02-12 10:25:46 -08009#include <clk.h>
Vikas Manocha6a12ceb2016-02-11 15:47:19 -080010#include <dm.h>
11#include <asm/io.h>
12#include <serial.h>
Toshifumi NISHINAGAba0a3c12016-07-08 01:02:24 +090013#include <asm/arch/stm32.h>
Patrice Chotardae74de02018-01-12 09:23:49 +010014#include "serial_stm32.h"
Vikas Manocha6a12ceb2016-02-11 15:47:19 -080015
Vikas Manocha6a12ceb2016-02-11 15:47:19 -080016static int stm32_serial_setbrg(struct udevice *dev, int baudrate)
17{
Patrice Chotard60a996b2017-09-27 15:44:50 +020018 struct stm32x7_serial_platdata *plat = dev_get_platdata(dev);
19 bool stm32f4 = plat->uart_info->stm32f4;
20 fdt_addr_t base = plat->base;
Patrice Chotard27265ce2017-07-18 09:29:08 +020021 u32 int_div, mantissa, fraction, oversampling;
Toshifumi NISHINAGAba0a3c12016-07-08 01:02:24 +090022
Patrice Chotard27265ce2017-07-18 09:29:08 +020023 int_div = DIV_ROUND_CLOSEST(plat->clock_rate, baudrate);
Patrice Chotard1afcf9c2017-06-08 09:26:55 +020024
25 if (int_div < 16) {
26 oversampling = 8;
Patrice Chotard60a996b2017-09-27 15:44:50 +020027 setbits_le32(base + CR1_OFFSET(stm32f4), USART_CR1_OVER8);
Patrice Chotard1afcf9c2017-06-08 09:26:55 +020028 } else {
29 oversampling = 16;
Patrice Chotard60a996b2017-09-27 15:44:50 +020030 clrbits_le32(base + CR1_OFFSET(stm32f4), USART_CR1_OVER8);
Patrice Chotard1afcf9c2017-06-08 09:26:55 +020031 }
32
33 mantissa = (int_div / oversampling) << USART_BRR_M_SHIFT;
34 fraction = int_div % oversampling;
35
Patrice Chotard60a996b2017-09-27 15:44:50 +020036 writel(mantissa | fraction, base + BRR_OFFSET(stm32f4));
Vikas Manocha6a12ceb2016-02-11 15:47:19 -080037
38 return 0;
39}
40
41static int stm32_serial_getc(struct udevice *dev)
42{
Patrice Chotard60a996b2017-09-27 15:44:50 +020043 struct stm32x7_serial_platdata *plat = dev_get_platdata(dev);
44 bool stm32f4 = plat->uart_info->stm32f4;
45 fdt_addr_t base = plat->base;
Vikas Manocha6a12ceb2016-02-11 15:47:19 -080046
Patrice Chotard60a996b2017-09-27 15:44:50 +020047 if ((readl(base + ISR_OFFSET(stm32f4)) & USART_SR_FLAG_RXNE) == 0)
Vikas Manocha6a12ceb2016-02-11 15:47:19 -080048 return -EAGAIN;
49
Patrice Chotard60a996b2017-09-27 15:44:50 +020050 return readl(base + RDR_OFFSET(stm32f4));
Vikas Manocha6a12ceb2016-02-11 15:47:19 -080051}
52
53static int stm32_serial_putc(struct udevice *dev, const char c)
54{
Patrice Chotard60a996b2017-09-27 15:44:50 +020055 struct stm32x7_serial_platdata *plat = dev_get_platdata(dev);
56 bool stm32f4 = plat->uart_info->stm32f4;
57 fdt_addr_t base = plat->base;
Vikas Manocha6a12ceb2016-02-11 15:47:19 -080058
Patrice Chotard60a996b2017-09-27 15:44:50 +020059 if ((readl(base + ISR_OFFSET(stm32f4)) & USART_SR_FLAG_TXE) == 0)
Vikas Manocha6a12ceb2016-02-11 15:47:19 -080060 return -EAGAIN;
61
Patrice Chotard60a996b2017-09-27 15:44:50 +020062 writel(c, base + TDR_OFFSET(stm32f4));
Vikas Manocha6a12ceb2016-02-11 15:47:19 -080063
64 return 0;
65}
66
67static int stm32_serial_pending(struct udevice *dev, bool input)
68{
Patrice Chotard60a996b2017-09-27 15:44:50 +020069 struct stm32x7_serial_platdata *plat = dev_get_platdata(dev);
70 bool stm32f4 = plat->uart_info->stm32f4;
71 fdt_addr_t base = plat->base;
Vikas Manocha6a12ceb2016-02-11 15:47:19 -080072
73 if (input)
Patrice Chotard60a996b2017-09-27 15:44:50 +020074 return readl(base + ISR_OFFSET(stm32f4)) &
75 USART_SR_FLAG_RXNE ? 1 : 0;
Vikas Manocha6a12ceb2016-02-11 15:47:19 -080076 else
Patrice Chotard60a996b2017-09-27 15:44:50 +020077 return readl(base + ISR_OFFSET(stm32f4)) &
78 USART_SR_FLAG_TXE ? 0 : 1;
Vikas Manocha6a12ceb2016-02-11 15:47:19 -080079}
80
81static int stm32_serial_probe(struct udevice *dev)
82{
Patrice Chotard60a996b2017-09-27 15:44:50 +020083 struct stm32x7_serial_platdata *plat = dev_get_platdata(dev);
Patrice Chotard9a212d72017-09-27 15:44:53 +020084 struct clk clk;
Patrice Chotard60a996b2017-09-27 15:44:50 +020085 fdt_addr_t base = plat->base;
Patrice Chotard9a212d72017-09-27 15:44:53 +020086 int ret;
Patrice Chotard60a996b2017-09-27 15:44:50 +020087 bool stm32f4;
88 u8 uart_enable_bit;
89
90 plat->uart_info = (struct stm32_uart_info *)dev_get_driver_data(dev);
91 stm32f4 = plat->uart_info->stm32f4;
92 uart_enable_bit = plat->uart_info->uart_enable_bit;
Vikas Manochafd03b832017-02-12 10:25:46 -080093
Vikas Manochafd03b832017-02-12 10:25:46 -080094 ret = clk_get_by_index(dev, 0, &clk);
95 if (ret < 0)
96 return ret;
97
98 ret = clk_enable(&clk);
99 if (ret) {
100 dev_err(dev, "failed to enable clock\n");
101 return ret;
102 }
Vikas Manochafd03b832017-02-12 10:25:46 -0800103
Patrice Chotard27265ce2017-07-18 09:29:08 +0200104 plat->clock_rate = clk_get_rate(&clk);
105 if (plat->clock_rate < 0) {
106 clk_disable(&clk);
107 return plat->clock_rate;
108 };
109
Patrice Chotard60a996b2017-09-27 15:44:50 +0200110 /* Disable uart-> disable overrun-> enable uart */
111 clrbits_le32(base + CR1_OFFSET(stm32f4), USART_CR1_RE | USART_CR1_TE |
112 BIT(uart_enable_bit));
113 if (plat->uart_info->has_overrun_disable)
114 setbits_le32(base + CR3_OFFSET(stm32f4), USART_CR3_OVRDIS);
Patrice Chotard2a7ecc52017-09-27 15:44:51 +0200115 if (plat->uart_info->has_fifo)
116 setbits_le32(base + CR1_OFFSET(stm32f4), USART_CR1_FIFOEN);
Patrice Chotard60a996b2017-09-27 15:44:50 +0200117 setbits_le32(base + CR1_OFFSET(stm32f4), USART_CR1_RE | USART_CR1_TE |
118 BIT(uart_enable_bit));
Vikas Manocha6a12ceb2016-02-11 15:47:19 -0800119
120 return 0;
121}
122
Vikas Manocha42bf5e72017-02-12 10:25:44 -0800123static const struct udevice_id stm32_serial_id[] = {
Patrice Chotard6c30f152017-09-27 15:44:52 +0200124 { .compatible = "st,stm32-uart", .data = (ulong)&stm32f4_info},
Patrice Chotard2a7ecc52017-09-27 15:44:51 +0200125 { .compatible = "st,stm32f7-uart", .data = (ulong)&stm32f7_info},
126 { .compatible = "st,stm32h7-uart", .data = (ulong)&stm32h7_info},
Vikas Manocha42bf5e72017-02-12 10:25:44 -0800127 {}
128};
129
130static int stm32_serial_ofdata_to_platdata(struct udevice *dev)
131{
132 struct stm32x7_serial_platdata *plat = dev_get_platdata(dev);
Vikas Manocha42bf5e72017-02-12 10:25:44 -0800133
Patrice Chotard60a996b2017-09-27 15:44:50 +0200134 plat->base = devfdt_get_addr(dev);
135 if (plat->base == FDT_ADDR_T_NONE)
Vikas Manocha42bf5e72017-02-12 10:25:44 -0800136 return -EINVAL;
137
Vikas Manocha42bf5e72017-02-12 10:25:44 -0800138 return 0;
139}
Vikas Manocha42bf5e72017-02-12 10:25:44 -0800140
Vikas Manocha6a12ceb2016-02-11 15:47:19 -0800141static const struct dm_serial_ops stm32_serial_ops = {
142 .putc = stm32_serial_putc,
143 .pending = stm32_serial_pending,
144 .getc = stm32_serial_getc,
145 .setbrg = stm32_serial_setbrg,
146};
147
148U_BOOT_DRIVER(serial_stm32) = {
Patrice Chotardae74de02018-01-12 09:23:49 +0100149 .name = "serial_stm32",
Vikas Manocha6a12ceb2016-02-11 15:47:19 -0800150 .id = UCLASS_SERIAL,
Vikas Manocha42bf5e72017-02-12 10:25:44 -0800151 .of_match = of_match_ptr(stm32_serial_id),
152 .ofdata_to_platdata = of_match_ptr(stm32_serial_ofdata_to_platdata),
153 .platdata_auto_alloc_size = sizeof(struct stm32x7_serial_platdata),
Vikas Manocha6a12ceb2016-02-11 15:47:19 -0800154 .ops = &stm32_serial_ops,
155 .probe = stm32_serial_probe,
156 .flags = DM_FLAG_PRE_RELOC,
157};