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Vikas Manocha6a12ceb2016-02-11 15:47:19 -08001/*
2 * (C) Copyright 2016
3 * Vikas Manocha, <vikas.manocha@st.com>
4 *
5 * SPDX-License-Identifier: GPL-2.0+
6 */
7
8#include <common.h>
Vikas Manochafd03b832017-02-12 10:25:46 -08009#include <clk.h>
Vikas Manocha6a12ceb2016-02-11 15:47:19 -080010#include <dm.h>
11#include <asm/io.h>
12#include <serial.h>
Toshifumi NISHINAGAba0a3c12016-07-08 01:02:24 +090013#include <asm/arch/stm32.h>
Vikas Manocha6a12ceb2016-02-11 15:47:19 -080014#include "serial_stm32x7.h"
15
16DECLARE_GLOBAL_DATA_PTR;
17
18static int stm32_serial_setbrg(struct udevice *dev, int baudrate)
19{
Patrice Chotard60a996b2017-09-27 15:44:50 +020020 struct stm32x7_serial_platdata *plat = dev_get_platdata(dev);
21 bool stm32f4 = plat->uart_info->stm32f4;
22 fdt_addr_t base = plat->base;
Patrice Chotard27265ce2017-07-18 09:29:08 +020023 u32 int_div, mantissa, fraction, oversampling;
Toshifumi NISHINAGAba0a3c12016-07-08 01:02:24 +090024
Patrice Chotard27265ce2017-07-18 09:29:08 +020025 int_div = DIV_ROUND_CLOSEST(plat->clock_rate, baudrate);
Patrice Chotard1afcf9c2017-06-08 09:26:55 +020026
27 if (int_div < 16) {
28 oversampling = 8;
Patrice Chotard60a996b2017-09-27 15:44:50 +020029 setbits_le32(base + CR1_OFFSET(stm32f4), USART_CR1_OVER8);
Patrice Chotard1afcf9c2017-06-08 09:26:55 +020030 } else {
31 oversampling = 16;
Patrice Chotard60a996b2017-09-27 15:44:50 +020032 clrbits_le32(base + CR1_OFFSET(stm32f4), USART_CR1_OVER8);
Patrice Chotard1afcf9c2017-06-08 09:26:55 +020033 }
34
35 mantissa = (int_div / oversampling) << USART_BRR_M_SHIFT;
36 fraction = int_div % oversampling;
37
Patrice Chotard60a996b2017-09-27 15:44:50 +020038 writel(mantissa | fraction, base + BRR_OFFSET(stm32f4));
Vikas Manocha6a12ceb2016-02-11 15:47:19 -080039
40 return 0;
41}
42
43static int stm32_serial_getc(struct udevice *dev)
44{
Patrice Chotard60a996b2017-09-27 15:44:50 +020045 struct stm32x7_serial_platdata *plat = dev_get_platdata(dev);
46 bool stm32f4 = plat->uart_info->stm32f4;
47 fdt_addr_t base = plat->base;
Vikas Manocha6a12ceb2016-02-11 15:47:19 -080048
Patrice Chotard60a996b2017-09-27 15:44:50 +020049 if ((readl(base + ISR_OFFSET(stm32f4)) & USART_SR_FLAG_RXNE) == 0)
Vikas Manocha6a12ceb2016-02-11 15:47:19 -080050 return -EAGAIN;
51
Patrice Chotard60a996b2017-09-27 15:44:50 +020052 return readl(base + RDR_OFFSET(stm32f4));
Vikas Manocha6a12ceb2016-02-11 15:47:19 -080053}
54
55static int stm32_serial_putc(struct udevice *dev, const char c)
56{
Patrice Chotard60a996b2017-09-27 15:44:50 +020057 struct stm32x7_serial_platdata *plat = dev_get_platdata(dev);
58 bool stm32f4 = plat->uart_info->stm32f4;
59 fdt_addr_t base = plat->base;
Vikas Manocha6a12ceb2016-02-11 15:47:19 -080060
Patrice Chotard60a996b2017-09-27 15:44:50 +020061 if ((readl(base + ISR_OFFSET(stm32f4)) & USART_SR_FLAG_TXE) == 0)
Vikas Manocha6a12ceb2016-02-11 15:47:19 -080062 return -EAGAIN;
63
Patrice Chotard60a996b2017-09-27 15:44:50 +020064 writel(c, base + TDR_OFFSET(stm32f4));
Vikas Manocha6a12ceb2016-02-11 15:47:19 -080065
66 return 0;
67}
68
69static int stm32_serial_pending(struct udevice *dev, bool input)
70{
Patrice Chotard60a996b2017-09-27 15:44:50 +020071 struct stm32x7_serial_platdata *plat = dev_get_platdata(dev);
72 bool stm32f4 = plat->uart_info->stm32f4;
73 fdt_addr_t base = plat->base;
Vikas Manocha6a12ceb2016-02-11 15:47:19 -080074
75 if (input)
Patrice Chotard60a996b2017-09-27 15:44:50 +020076 return readl(base + ISR_OFFSET(stm32f4)) &
77 USART_SR_FLAG_RXNE ? 1 : 0;
Vikas Manocha6a12ceb2016-02-11 15:47:19 -080078 else
Patrice Chotard60a996b2017-09-27 15:44:50 +020079 return readl(base + ISR_OFFSET(stm32f4)) &
80 USART_SR_FLAG_TXE ? 0 : 1;
Vikas Manocha6a12ceb2016-02-11 15:47:19 -080081}
82
83static int stm32_serial_probe(struct udevice *dev)
84{
Patrice Chotard60a996b2017-09-27 15:44:50 +020085 struct stm32x7_serial_platdata *plat = dev_get_platdata(dev);
86 fdt_addr_t base = plat->base;
87 bool stm32f4;
88 u8 uart_enable_bit;
89
90 plat->uart_info = (struct stm32_uart_info *)dev_get_driver_data(dev);
91 stm32f4 = plat->uart_info->stm32f4;
92 uart_enable_bit = plat->uart_info->uart_enable_bit;
Vikas Manochafd03b832017-02-12 10:25:46 -080093
94#ifdef CONFIG_CLK
95 int ret;
96 struct clk clk;
97
98 ret = clk_get_by_index(dev, 0, &clk);
99 if (ret < 0)
100 return ret;
101
102 ret = clk_enable(&clk);
103 if (ret) {
104 dev_err(dev, "failed to enable clock\n");
105 return ret;
106 }
107#endif
108
Patrice Chotard27265ce2017-07-18 09:29:08 +0200109 plat->clock_rate = clk_get_rate(&clk);
110 if (plat->clock_rate < 0) {
111 clk_disable(&clk);
112 return plat->clock_rate;
113 };
114
Patrice Chotard60a996b2017-09-27 15:44:50 +0200115 /* Disable uart-> disable overrun-> enable uart */
116 clrbits_le32(base + CR1_OFFSET(stm32f4), USART_CR1_RE | USART_CR1_TE |
117 BIT(uart_enable_bit));
118 if (plat->uart_info->has_overrun_disable)
119 setbits_le32(base + CR3_OFFSET(stm32f4), USART_CR3_OVRDIS);
Patrice Chotard2a7ecc52017-09-27 15:44:51 +0200120 if (plat->uart_info->has_fifo)
121 setbits_le32(base + CR1_OFFSET(stm32f4), USART_CR1_FIFOEN);
Patrice Chotard60a996b2017-09-27 15:44:50 +0200122 setbits_le32(base + CR1_OFFSET(stm32f4), USART_CR1_RE | USART_CR1_TE |
123 BIT(uart_enable_bit));
Vikas Manocha6a12ceb2016-02-11 15:47:19 -0800124
125 return 0;
126}
127
Vikas Manocha42bf5e72017-02-12 10:25:44 -0800128#if CONFIG_IS_ENABLED(OF_CONTROL)
129static const struct udevice_id stm32_serial_id[] = {
Patrice Chotard6c30f152017-09-27 15:44:52 +0200130 { .compatible = "st,stm32-uart", .data = (ulong)&stm32f4_info},
Patrice Chotard2a7ecc52017-09-27 15:44:51 +0200131 { .compatible = "st,stm32f7-uart", .data = (ulong)&stm32f7_info},
132 { .compatible = "st,stm32h7-uart", .data = (ulong)&stm32h7_info},
Vikas Manocha42bf5e72017-02-12 10:25:44 -0800133 {}
134};
135
136static int stm32_serial_ofdata_to_platdata(struct udevice *dev)
137{
138 struct stm32x7_serial_platdata *plat = dev_get_platdata(dev);
Vikas Manocha42bf5e72017-02-12 10:25:44 -0800139
Patrice Chotard60a996b2017-09-27 15:44:50 +0200140 plat->base = devfdt_get_addr(dev);
141 if (plat->base == FDT_ADDR_T_NONE)
Vikas Manocha42bf5e72017-02-12 10:25:44 -0800142 return -EINVAL;
143
Vikas Manocha42bf5e72017-02-12 10:25:44 -0800144 return 0;
145}
146#endif
147
Vikas Manocha6a12ceb2016-02-11 15:47:19 -0800148static const struct dm_serial_ops stm32_serial_ops = {
149 .putc = stm32_serial_putc,
150 .pending = stm32_serial_pending,
151 .getc = stm32_serial_getc,
152 .setbrg = stm32_serial_setbrg,
153};
154
155U_BOOT_DRIVER(serial_stm32) = {
156 .name = "serial_stm32x7",
157 .id = UCLASS_SERIAL,
Vikas Manocha42bf5e72017-02-12 10:25:44 -0800158 .of_match = of_match_ptr(stm32_serial_id),
159 .ofdata_to_platdata = of_match_ptr(stm32_serial_ofdata_to_platdata),
160 .platdata_auto_alloc_size = sizeof(struct stm32x7_serial_platdata),
Vikas Manocha6a12ceb2016-02-11 15:47:19 -0800161 .ops = &stm32_serial_ops,
162 .probe = stm32_serial_probe,
163 .flags = DM_FLAG_PRE_RELOC,
164};