| // SPDX-License-Identifier: GPL-2.0+ |
| // |
| // Copyright 2013-2019 Boundary Devices, Inc. |
| // Copyright 2012 Freescale Semiconductor, Inc. |
| // Copyright 2011 Linaro Ltd. |
| |
| #include <dt-bindings/clock/imx6qdl-clock.h> |
| #include <dt-bindings/gpio/gpio.h> |
| #include <dt-bindings/input/input.h> |
| |
| &iomuxc { |
| pinctrl-names = "default"; |
| pinctrl-0 = <&pinctrl_hog>; |
| |
| pinctrl_ecspi1: ecspi1grp { |
| fsl,pins = < |
| MX6QDL_PAD_EIM_D17__ECSPI1_MISO 0x100b1 |
| MX6QDL_PAD_EIM_D18__ECSPI1_MOSI 0x100b1 |
| MX6QDL_PAD_EIM_D16__ECSPI1_SCLK 0x000b1 |
| #define GP_ECSPI1_NOR_CS <&gpio3 19 GPIO_ACTIVE_LOW> |
| MX6QDL_PAD_EIM_D19__GPIO3_IO19 0x0b0b1 |
| >; |
| }; |
| |
| pinctrl_enet: enetgrp { |
| fsl,pins = < |
| MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0 |
| MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0 |
| MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x100b0 |
| MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x100b0 |
| MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x100b0 |
| MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x100b0 |
| MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x100b0 |
| MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x100b0 |
| MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x100b0 |
| MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b0b0 |
| MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b0b0 |
| MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b0b0 |
| MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b0b0 |
| MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b0b0 |
| MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b0b0 |
| #undef GP_ENET_PHY_RESET |
| #define GP_ENET_PHY_RESET <&gpio3 23 GPIO_ACTIVE_LOW> |
| MX6QDL_PAD_EIM_D23__GPIO3_IO23 0x030b0 |
| #define GPIRQ_ENET_PHY <&gpio1 28 IRQ_TYPE_LEVEL_LOW> |
| MX6QDL_PAD_ENET_TX_EN__GPIO1_IO28 0x1b0b0 |
| >; |
| }; |
| |
| pinctrl_hog: hoggrp { |
| fsl,pins = < |
| /* Spare */ |
| MX6QDL_PAD_NANDF_D7__GPIO2_IO07 0x1b0b0 |
| >; |
| }; |
| |
| pinctrl_i2c1: i2c1grp { |
| fsl,pins = < |
| MX6QDL_PAD_EIM_D21__I2C1_SCL 0x4001b8b1 |
| MX6QDL_PAD_EIM_D28__I2C1_SDA 0x4001b8b1 |
| >; |
| }; |
| |
| pinctrl_i2c1_1: i2c1-1grp { |
| fsl,pins = < |
| #define GP_I2C1_SCL <&gpio3 21 GPIO_ACTIVE_HIGH> |
| MX6QDL_PAD_EIM_D21__GPIO3_IO21 0x4001b8b1 |
| #define GP_I2C1_SDA <&gpio3 28 GPIO_ACTIVE_HIGH> |
| MX6QDL_PAD_EIM_D28__GPIO3_IO28 0x4001b8b1 |
| >; |
| }; |
| |
| pinctrl_i2c2: i2c2grp { |
| fsl,pins = < |
| MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1 |
| MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1 |
| >; |
| }; |
| |
| pinctrl_i2c2_1: i2c2-1grp { |
| fsl,pins = < |
| #define GP_I2C2_SCL <&gpio4 12 GPIO_ACTIVE_HIGH> |
| MX6QDL_PAD_KEY_COL3__GPIO4_IO12 0x4001b8b1 |
| #define GP_I2C2_SDA <&gpio4 13 GPIO_ACTIVE_HIGH> |
| MX6QDL_PAD_KEY_ROW3__GPIO4_IO13 0x4001b8b1 |
| >; |
| }; |
| |
| pinctrl_i2c3: i2c3grp { |
| fsl,pins = < |
| MX6QDL_PAD_GPIO_5__I2C3_SCL 0x4001b8b1 |
| MX6QDL_PAD_GPIO_16__I2C3_SDA 0x4001b8b1 |
| #define GPIRQ_I2C3_J7 <&gpio1 9 IRQ_TYPE_EDGE_FALLING> |
| #define GP_I2C3_J7 <&gpio1 9 GPIO_ACTIVE_LOW> |
| MX6QDL_PAD_GPIO_9__GPIO1_IO09 0x1b0b0 |
| >; |
| }; |
| |
| pinctrl_i2c3_1: i2c3-1grp { |
| fsl,pins = < |
| #define GP_I2C3_SCL <&gpio1 5 GPIO_ACTIVE_HIGH> |
| MX6QDL_PAD_GPIO_5__GPIO1_IO05 0x4001b8b1 |
| #define GP_I2C3_SDA <&gpio7 11 GPIO_ACTIVE_HIGH> |
| MX6QDL_PAD_GPIO_16__GPIO7_IO11 0x4001b8b1 |
| >; |
| }; |
| |
| pinctrl_pwm1: pwm1grp { |
| fsl,pins = < |
| MX6QDL_PAD_SD1_DAT3__PWM1_OUT 0x1b0b1 |
| >; |
| }; |
| |
| pinctrl_pwm3: pwm3grp { |
| fsl,pins = < |
| MX6QDL_PAD_SD1_DAT1__PWM3_OUT 0x1b0b1 |
| >; |
| }; |
| |
| pinctrl_pwm4: pwm4grp { |
| fsl,pins = < |
| MX6QDL_PAD_SD1_CMD__PWM4_OUT 0x1b0b1 |
| >; |
| }; |
| |
| pinctrl_reg_usbotg_vbus: reg-usbotg-vbusgrp { |
| fsl,pins = < |
| #define GP_REG_USBOTG <&gpio3 22 GPIO_ACTIVE_HIGH> |
| MX6QDL_PAD_EIM_D22__GPIO3_IO22 0x030b0 |
| >; |
| }; |
| |
| pinctrl_uart1: uart1grp { |
| fsl,pins = < |
| MX6QDL_PAD_SD3_DAT7__UART1_TX_DATA 0x1b0b1 |
| MX6QDL_PAD_SD3_DAT6__UART1_RX_DATA 0x1b0b1 |
| >; |
| }; |
| |
| pinctrl_uart2: uart2grp { |
| fsl,pins = < |
| MX6QDL_PAD_EIM_D26__UART2_TX_DATA 0x1b0b1 |
| MX6QDL_PAD_EIM_D27__UART2_RX_DATA 0x1b0b1 |
| >; |
| }; |
| |
| pinctrl_usbh1: usbh1grp { |
| fsl,pins = < |
| #define GP_USBH1_HUB_RESET <&gpio7 12 GPIO_ACTIVE_LOW> |
| MX6QDL_PAD_GPIO_17__GPIO7_IO12 0x0b0b0 |
| >; |
| }; |
| |
| pinctrl_usbotg: usbotggrp { |
| fsl,pins = < |
| MX6QDL_PAD_GPIO_1__USB_OTG_ID 0x17059 |
| MX6QDL_PAD_KEY_COL4__USB_OTG_OC 0x1b0b0 |
| >; |
| }; |
| |
| pinctrl_usdhc3: usdhc3grp { |
| fsl,pins = < |
| MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17059 |
| MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10059 |
| MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17059 |
| MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17059 |
| MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17059 |
| MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17059 |
| #define GP_USDHC3_CD <&gpio7 0 GPIO_ACTIVE_LOW> |
| MX6QDL_PAD_SD3_DAT5__GPIO7_IO00 0x1b0b0 |
| #define GP_USDHC3_WP <&gpio7 1 GPIO_ACTIVE_HIGH> |
| MX6QDL_PAD_SD3_DAT4__GPIO7_IO01 0x1b0b0 |
| >; |
| }; |
| |
| pinctrl_usdhc4: usdhc4grp { |
| fsl,pins = < |
| MX6QDL_PAD_SD4_CMD__SD4_CMD 0x17059 |
| MX6QDL_PAD_SD4_CLK__SD4_CLK 0x10059 |
| MX6QDL_PAD_SD4_DAT0__SD4_DATA0 0x17059 |
| MX6QDL_PAD_SD4_DAT1__SD4_DATA1 0x17059 |
| MX6QDL_PAD_SD4_DAT2__SD4_DATA2 0x17059 |
| MX6QDL_PAD_SD4_DAT3__SD4_DATA3 0x17059 |
| #define GP_USDHC4_CD <&gpio2 6 GPIO_ACTIVE_LOW> |
| MX6QDL_PAD_NANDF_D6__GPIO2_IO06 0x1b0b0 |
| >; |
| }; |
| }; |
| |
| / { |
| aliases { |
| mmc0 = &usdhc3; |
| mmc1 = &usdhc4; |
| pwm_lcd = &pwm1; |
| pwm_lvds = &pwm4; |
| }; |
| |
| chosen { |
| stdout-path = &uart2; |
| }; |
| |
| memory { |
| reg = <0x10000000 0x40000000>; |
| }; |
| |
| reg_3p3v: regulator-3v3 { |
| compatible = "regulator-fixed"; |
| regulator-name = "3P3V"; |
| regulator-min-microvolt = <3300000>; |
| regulator-max-microvolt = <3300000>; |
| regulator-always-on; |
| }; |
| |
| reg_usb_otg_vbus: regulator-usb-otg-vbus { |
| compatible = "regulator-fixed"; |
| regulator-name = "usb_otg_vbus"; |
| regulator-min-microvolt = <5000000>; |
| regulator-max-microvolt = <5000000>; |
| gpio = GP_REG_USBOTG; |
| enable-active-high; |
| }; |
| }; |
| |
| &ecspi1 { |
| cs-gpios = GP_ECSPI1_NOR_CS; |
| pinctrl-names = "default"; |
| pinctrl-0 = <&pinctrl_ecspi1>; |
| status = "okay"; |
| |
| flash: m25p80@0 { |
| compatible = "sst,sst25vf016b", "jedec,spi-nor"; |
| spi-max-frequency = <20000000>; |
| reg = <0>; |
| #address-cells = <1>; |
| #size-cells = <1>; |
| mtd@00000000 { |
| label = "U-Boot"; |
| reg = <0x0 0xC0000>; |
| }; |
| |
| mtd@000C0000 { |
| label = "env"; |
| reg = <0xC0000 0x2000>; |
| }; |
| mtd@000C2000 { |
| label = "splash"; |
| reg = <0xC2000 0x13e000>; |
| }; |
| }; |
| }; |
| |
| &fec { |
| phy-handle = <ðphy>; |
| phy-mode = "rgmii"; |
| #if 0 |
| phy-reset-gpios = GP_ENET_PHY_RESET; |
| #endif |
| pinctrl-names = "default"; |
| pinctrl-0 = <&pinctrl_enet>; |
| rxc-skew-ps = <3000>; |
| rxd0-skew-ps = <0>; |
| rxd1-skew-ps = <0>; |
| rxd2-skew-ps = <0>; |
| rxd3-skew-ps = <0>; |
| rxdv-skew-ps = <0>; |
| status = "okay"; |
| txc-skew-ps = <3000>; |
| txd0-skew-ps = <0>; |
| txd1-skew-ps = <0>; |
| txd2-skew-ps = <0>; |
| txd3-skew-ps = <0>; |
| txen-skew-ps = <0>; |
| |
| mdio { |
| #address-cells = <0>; |
| #size-cells = <1>; |
| |
| ethphy: ethernet-phy { |
| interrupts-extended = GPIRQ_ENET_PHY; |
| }; |
| }; |
| }; |
| |
| &i2c1 { |
| clock-frequency = <100000>; |
| pinctrl-names = "default", "gpio"; |
| pinctrl-0 = <&pinctrl_i2c1>; |
| pinctrl-1 = <&pinctrl_i2c1_1>; |
| scl-gpios = GP_I2C1_SCL; |
| sda-gpios = GP_I2C1_SDA; |
| status = "okay"; |
| }; |
| |
| &i2c2 { |
| clock-frequency = <100000>; |
| pinctrl-names = "default", "gpio"; |
| pinctrl-0 = <&pinctrl_i2c2>; |
| pinctrl-1 = <&pinctrl_i2c2_1>; |
| scl-gpios = GP_I2C2_SCL; |
| sda-gpios = GP_I2C2_SDA; |
| status = "okay"; |
| |
| hdmi_edid: edid@50 { |
| compatible = "fsl,imx6-hdmi-i2c"; |
| reg = <0x50>; |
| }; |
| }; |
| |
| &i2c3 { |
| clock-frequency = <100000>; |
| pinctrl-names = "default", "gpio"; |
| pinctrl-0 = <&pinctrl_i2c3>; |
| pinctrl-1 = <&pinctrl_i2c3_1>; |
| scl-gpios = GP_I2C3_SCL; |
| sda-gpios = GP_I2C3_SDA; |
| status = "okay"; |
| }; |
| |
| &pcie { |
| status = "okay"; |
| }; |
| |
| &pwm1 { |
| pinctrl-names = "default"; |
| pinctrl-0 = <&pinctrl_pwm1>; |
| status = "okay"; |
| }; |
| |
| &pwm3 { |
| pinctrl-names = "default"; |
| pinctrl-0 = <&pinctrl_pwm3>; |
| status = "okay"; |
| }; |
| |
| &pwm4 { |
| pinctrl-names = "default"; |
| pinctrl-0 = <&pinctrl_pwm4>; |
| status = "okay"; |
| }; |
| |
| &uart1 { |
| pinctrl-names = "default"; |
| pinctrl-0 = <&pinctrl_uart1>; |
| status = "okay"; |
| }; |
| |
| &uart2 { |
| pinctrl-names = "default"; |
| pinctrl-0 = <&pinctrl_uart2>; |
| status = "okay"; |
| }; |
| |
| &usbh1 { |
| pinctrl-names = "default"; |
| pinctrl-0 = <&pinctrl_usbh1>; |
| disable-over-current; |
| reset-gpios = GP_USBH1_HUB_RESET; |
| status = "okay"; |
| }; |
| |
| &usbotg { |
| vbus-supply = <®_usb_otg_vbus>; |
| pinctrl-names = "default"; |
| pinctrl-0 = <&pinctrl_usbotg>; |
| disable-over-current; |
| status = "okay"; |
| }; |
| |
| &usdhc3 { |
| pinctrl-names = "default"; |
| pinctrl-0 = <&pinctrl_usdhc3>; |
| cd-gpios = GP_USDHC3_CD; |
| wp-gpios = GP_USDHC3_WP; |
| vmmc-supply = <®_3p3v>; |
| status = "okay"; |
| }; |
| |
| &usdhc4 { |
| pinctrl-names = "default"; |
| pinctrl-0 = <&pinctrl_usdhc4>; |
| cd-gpios = GP_USDHC4_CD; |
| vmmc-supply = <®_3p3v>; |
| status = "okay"; |
| }; |