| /* |
| * Copyright (C) 2015 Technexion Ltd. |
| * |
| * Configuration settings for the Technexion PICO-IMX6UL-EMMC board. |
| * |
| * SPDX-License-Identifier: GPL-2.0+ |
| */ |
| #ifndef __PICO_IMX6UL_CONFIG_H |
| #define __PICO_IMX6UL_CONFIG_H |
| |
| |
| #include <asm/arch/imx-regs.h> |
| #include <linux/sizes.h> |
| #include "mx6_common.h" |
| #include <asm/imx-common/gpio.h> |
| |
| /* Network support */ |
| |
| #define CONFIG_FEC_MXC |
| #define CONFIG_MII |
| #define IMX_FEC_BASE ENET2_BASE_ADDR |
| #define CONFIG_FEC_MXC_PHYADDR 0x1 |
| #define CONFIG_FEC_XCV_TYPE RMII |
| #define CONFIG_PHYLIB |
| #define CONFIG_PHY_MICREL |
| |
| /* Size of malloc() pool */ |
| #define CONFIG_SYS_MALLOC_LEN (35 * SZ_1M) /* Increase due to DFU */ |
| |
| #define CONFIG_BOARD_EARLY_INIT_F |
| |
| #define CONFIG_MXC_UART |
| #define CONFIG_MXC_UART_BASE UART6_BASE_ADDR |
| |
| /* MMC Configs */ |
| #define CONFIG_FSL_USDHC |
| #define CONFIG_FSL_ESDHC |
| #define CONFIG_SYS_FSL_ESDHC_ADDR USDHC1_BASE_ADDR |
| |
| #define CONFIG_MMC |
| #define CONFIG_GENERIC_MMC |
| #define CONFIG_DOS_PARTITION |
| #define CONFIG_SUPPORT_EMMC_BOOT |
| |
| /* USB Configs */ |
| #define CONFIG_USB_EHCI |
| #define CONFIG_USB_EHCI_MX6 |
| #define CONFIG_EHCI_HCD_INIT_AFTER_RESET |
| #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) |
| #define CONFIG_MXC_USB_FLAGS 0 |
| #define CONFIG_USB_MAX_CONTROLLER_COUNT 2 |
| |
| #define CONFIG_USBD_HS |
| |
| #define CONFIG_USB_FUNCTION_MASS_STORAGE |
| #define CONFIG_USB_GADGET_VBUS_DRAW 2 |
| |
| #define CONFIG_SYS_DFU_DATA_BUF_SIZE SZ_16M |
| #define DFU_DEFAULT_POLL_TIMEOUT 300 |
| |
| #define CONFIG_SYS_MMC_IMG_LOAD_PART 1 |
| |
| #define CONFIG_EXTRA_ENV_SETTINGS \ |
| "image=zImage\0" \ |
| "console=ttymxc5\0" \ |
| "fdt_high=0xffffffff\0" \ |
| "initrd_high=0xffffffff\0" \ |
| "fdt_file=" CONFIG_DEFAULT_FDT_FILE "\0" \ |
| "fdt_addr=0x83000000\0" \ |
| "mmcdev="__stringify(CONFIG_SYS_MMC_ENV_DEV)"\0" \ |
| "mmcpart=" __stringify(CONFIG_SYS_MMC_IMG_LOAD_PART) "\0" \ |
| "mmcroot=" CONFIG_MMCROOT " rootwait rw\0" \ |
| "mmcautodetect=yes\0" \ |
| "dfu_alt_info=boot raw 0x2 0x400 mmcpart 1\0" \ |
| "mmcargs=setenv bootargs console=${console},${baudrate} " \ |
| "root=${mmcroot}\0" \ |
| "loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \ |
| "loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \ |
| "mmcboot=echo Booting from mmc ...; " \ |
| "run mmcargs; " \ |
| "if run loadfdt; then " \ |
| "bootz ${loadaddr} - ${fdt_addr}; " \ |
| "else " \ |
| "echo WARN: Cannot load the DT; " \ |
| "fi;\0" \ |
| "netargs=setenv bootargs console=${console},${baudrate} " \ |
| "root=/dev/nfs " \ |
| "ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \ |
| "netboot=echo Booting from net ...; " \ |
| "run netargs; " \ |
| "if test ${ip_dyn} = yes; then " \ |
| "setenv get_cmd dhcp; " \ |
| "else " \ |
| "setenv get_cmd tftp; " \ |
| "fi; " \ |
| "${get_cmd} ${image}; " \ |
| "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \ |
| "if ${get_cmd} ${fdt_addr} ${fdt_file}; then " \ |
| "bootz ${loadaddr} - ${fdt_addr}; " \ |
| "else " \ |
| "if test ${boot_fdt} = try; then " \ |
| "bootz; " \ |
| "else " \ |
| "echo WARN: Cannot load the DT; " \ |
| "fi; " \ |
| "fi; " \ |
| "else " \ |
| "bootz; " \ |
| "fi;\0" \ |
| |
| #define CONFIG_BOOTCOMMAND \ |
| "if mmc rescan; then " \ |
| "if run loadimage; then " \ |
| "run mmcboot; " \ |
| "else run netboot; " \ |
| "fi; " \ |
| "else run netboot; fi" |
| |
| #define CONFIG_SYS_MEMTEST_START 0x80000000 |
| #define CONFIG_SYS_MEMTEST_END CONFIG_SYS_MEMTEST_START + SZ_128M |
| |
| #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR |
| #define CONFIG_SYS_HZ 1000 |
| |
| #define CONFIG_CMDLINE_EDITING |
| #define CONFIG_STACKSIZE SZ_128K |
| |
| /* Physical Memory Map */ |
| #define CONFIG_NR_DRAM_BANKS 1 |
| #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR |
| |
| #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM |
| #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR |
| #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE |
| |
| #define CONFIG_SYS_INIT_SP_OFFSET \ |
| (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) |
| #define CONFIG_SYS_INIT_SP_ADDR \ |
| (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) |
| |
| /* I2C configs */ |
| #define CONFIG_SYS_I2C |
| #define CONFIG_SYS_I2C_MXC |
| #define CONFIG_SYS_I2C_MXC_I2C1 |
| #define CONFIG_SYS_I2C_SPEED 100000 |
| |
| /* PMIC */ |
| #define CONFIG_POWER |
| #define CONFIG_POWER_I2C |
| #define CONFIG_POWER_PFUZE3000 |
| #define CONFIG_POWER_PFUZE3000_I2C_ADDR 0x08 |
| |
| /* FLASH and environment organization */ |
| #define CONFIG_SYS_NO_FLASH |
| |
| #define CONFIG_ENV_SIZE SZ_8K |
| #define CONFIG_ENV_IS_IN_MMC |
| #define CONFIG_ENV_OFFSET (8 * SZ_64K) |
| |
| #define CONFIG_SYS_MMC_ENV_DEV 0 |
| #define CONFIG_SYS_MMC_ENV_PART 0 |
| #define CONFIG_MMCROOT "/dev/mmcblk0p2" |
| |
| #endif /* __PICO_IMX6UL_CONFIG_H */ |