| // SPDX-License-Identifier: GPL-2.0+ |
| /* |
| * Copyright (C) 2019 Parthiban Nallathambi <parthitce@gmail.com> |
| * Copyright (C) 2021 Marc Ferland, Amotus Solutions Inc., <ferlandm@amotus.ca> |
| */ |
| |
| /dts-v1/; |
| |
| #include "imx6ull.dtsi" |
| #include "imx6ull-dart-6ul.dtsi" |
| |
| / { |
| model = "Variscite DART-6UL Evaluation Kit"; |
| compatible = "variscite,imx6ull-dart-6ul", "fsl,imx6ull"; |
| }; |
| |
| &mdio1 { |
| /* KSZ8081RNB (carrier-board) */ |
| ethphy1: ethernet-phy@3 { |
| compatible = "ethernet-phy-ieee802.3-c22"; |
| clocks = <&clks IMX6UL_CLK_ENET2_REF>; |
| clock-names = "rmii-ref"; |
| micrel,led-mode = <1>; |
| max-speed = <100>; |
| reg = <3>; |
| }; |
| }; |
| |
| &fec2 { |
| pinctrl-names = "default"; |
| pinctrl-0 = <&pinctrl_enet2 &pinctrl_enet2_rst>; |
| phy-mode = "rmii"; |
| phy-handle = <ðphy1>; |
| phy-reset-gpios = <&gpio1 10 GPIO_ACTIVE_LOW>; |
| phy-reset-duration = <100>; |
| status = "okay"; |
| }; |
| |
| &usdhc2 { |
| status = "okay"; |
| }; |
| |
| &usbotg1 { |
| pinctrl-names = "default"; |
| pinctrl-0 = <&pinctrl_usb_otg1_id>; |
| dr_mode = "otg"; |
| srp-disable; |
| hnp-disable; |
| adp-disable; |
| status = "okay"; |
| }; |
| |
| &iomuxc { |
| pinctrl-names = "default"; |
| |
| pinctrl_usb_otg1_id: usbotg1idgrp { |
| fsl,pins = < |
| MX6UL_PAD_GPIO1_IO00__ANATOP_OTG1_ID 0x17059 |
| >; |
| }; |
| |
| pinctrl_enet2: enet2grp { |
| fsl,pins = < |
| MX6UL_PAD_ENET2_RX_EN__ENET2_RX_EN 0x1b0b0 |
| MX6UL_PAD_ENET2_RX_ER__ENET2_RX_ER 0x1b0b0 |
| MX6UL_PAD_ENET2_RX_DATA0__ENET2_RDATA00 0x1b0b0 |
| MX6UL_PAD_ENET2_RX_DATA1__ENET2_RDATA01 0x1b0b0 |
| MX6UL_PAD_ENET2_TX_EN__ENET2_TX_EN 0x1b0b0 |
| MX6UL_PAD_ENET2_TX_DATA0__ENET2_TDATA00 0x1b0b0 |
| MX6UL_PAD_ENET2_TX_DATA1__ENET2_TDATA01 0x1b0b0 |
| MX6UL_PAD_ENET2_TX_CLK__ENET2_REF_CLK2 0x4001b031 |
| >; |
| }; |
| |
| pinctrl_enet2_mdio: mdio_enet2_grp { |
| fsl,pins = < |
| MX6UL_PAD_GPIO1_IO07__ENET2_MDC 0x1b0b0 |
| MX6UL_PAD_GPIO1_IO06__ENET2_MDIO 0x1b0b0 |
| >; |
| }; |
| |
| pinctrl_enet2_rst: enet2-rst-grp { |
| fsl,pins = < |
| MX6UL_PAD_JTAG_MOD__GPIO1_IO10 0x1b0b0 |
| >; |
| }; |
| }; |