arch/x86/dts/cougarcanyon2.dts

// SPDX-License-Identifier: GPL-2.0+
/*
 * Copyright (C) 2016, Bin Meng <bmeng.cn@gmail.com>
 */

/dts-v1/;

/include/ "skeleton.dtsi"
/include/ "serial.dtsi"
/include/ "keyboard.dtsi"
/include/ "rtc.dtsi"
/include/ "tsc_timer.dtsi"

/ {
	model = "Intel Cougar Canyon 2";
	compatible = "intel,cougarcanyon2", "intel,chiefriver";

	aliases {
		spi0 = &spi0;
	};

	config {
		silent_console = <0>;
	};

	chosen {
		stdout-path = "/serial";
	};

	microcode {
		update@0 {
#include "microcode/m12306a2_00000008.dtsi"
		};
		update@1 {
#include "microcode/m12306a4_00000007.dtsi"
		};
		update@2 {
#include "microcode/m12306a5_00000007.dtsi"
		};
		update@3 {
#include "microcode/m12306a8_00000010.dtsi"
		};
		update@4 {
#include "microcode/m12306a9_0000001b.dtsi"
		};
	};

	fsp {
		compatible = "intel,ivybridge-fsp";
		fsp,enable-ht;
	};

	pci {
		#address-cells = <3>;
		#size-cells = <2>;
		compatible = "pci-x86";
		u-boot,dm-pre-reloc;
		ranges = <0x02000000 0x0 0xc0000000 0xc0000000 0 0x10000000
			  0x42000000 0x0 0xd0000000 0xd0000000 0 0x10000000
			  0x01000000 0x0 0x2000 0x2000 0 0xe000>;

		pch@1f,0 {
			reg = <0x0000f800 0 0 0 0>;
			compatible = "intel,bd82x6x";
			u-boot,dm-pre-reloc;
			#address-cells = <1>;
			#size-cells = <1>;

			spi0: spi {
				#address-cells = <1>;
				#size-cells = <0>;
				compatible = "intel,ich9-spi";
				intel,spi-lock-down;

				spi-flash@0 {
					reg = <0>;
					compatible = "winbond,w25q64bv", "spi-flash";
					memory-map = <0xff800000 0x00800000>;
				};
			};

			gpioa {
				compatible = "intel,ich6-gpio";
				u-boot,dm-pre-reloc;
				reg = <0 0x10>;
				bank-name = "A";
			};

			gpiob {
				compatible = "intel,ich6-gpio";
				u-boot,dm-pre-reloc;
				reg = <0x30 0x10>;
				bank-name = "B";
			};

			gpioc {
				compatible = "intel,ich6-gpio";
				u-boot,dm-pre-reloc;
				reg = <0x40 0x10>;
				bank-name = "C";
			};
		};
	};

};