| // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) |
| /* |
| * QorIQ FMan v3 device tree stub [ controller @ offset 0x400000 ] |
| * |
| * Copyright 2012 - 2015 Freescale Semiconductor Inc. |
| * Copyright 2020 NXP |
| * |
| */ |
| |
| fman0: fman@400000 { |
| #address-cells = <1>; |
| #size-cells = <1>; |
| cell-index = <0>; |
| compatible = "fsl,fman"; |
| ranges = <0 0x400000 0xfe000>; |
| reg = <0x400000 0xfe000>; |
| interrupts = <96 2 0 0>, <16 2 1 1>; |
| clocks = <&clockgen 3 0>; |
| clock-names = "fmanclk"; |
| fsl,qman-channel-range = <0x800 0x10>; |
| ptimer-handle = <&ptp_timer0>; |
| |
| muram@0 { |
| compatible = "fsl,fman-muram"; |
| reg = <0x0 0x60000>; |
| }; |
| |
| fman0_oh_0x2: port@82000 { |
| cell-index = <0x2>; |
| compatible = "fsl,fman-v3-port-oh"; |
| reg = <0x82000 0x1000>; |
| }; |
| |
| fman0_oh_0x3: port@83000 { |
| cell-index = <0x3>; |
| compatible = "fsl,fman-v3-port-oh"; |
| reg = <0x83000 0x1000>; |
| }; |
| |
| fman0_oh_0x4: port@84000 { |
| cell-index = <0x4>; |
| compatible = "fsl,fman-v3-port-oh"; |
| reg = <0x84000 0x1000>; |
| }; |
| |
| fman0_oh_0x5: port@85000 { |
| cell-index = <0x5>; |
| compatible = "fsl,fman-v3-port-oh"; |
| reg = <0x85000 0x1000>; |
| }; |
| |
| fman0_oh_0x6: port@86000 { |
| cell-index = <0x6>; |
| compatible = "fsl,fman-v3-port-oh"; |
| reg = <0x86000 0x1000>; |
| }; |
| |
| fman0_oh_0x7: port@87000 { |
| cell-index = <0x7>; |
| compatible = "fsl,fman-v3-port-oh"; |
| reg = <0x87000 0x1000>; |
| }; |
| |
| mdio0: mdio@fc000 { |
| #address-cells = <1>; |
| #size-cells = <0>; |
| compatible = "fsl,fman-memac-mdio", "fsl,fman-xmdio"; |
| reg = <0xfc000 0x1000>; |
| }; |
| |
| xmdio0: mdio@fd000 { |
| #address-cells = <1>; |
| #size-cells = <0>; |
| compatible = "fsl,fman-memac-mdio", "fsl,fman-xmdio"; |
| reg = <0xfd000 0x1000>; |
| }; |
| }; |
| |
| ptp_timer0: ptp-timer@4fe000 { |
| compatible = "fsl,fman-ptp-timer"; |
| reg = <0x4fe000 0x1000>; |
| interrupts = <96 2 0 0>; |
| clocks = <&clockgen 3 0>; |
| }; |