| /* SPDX-License-Identifier: GPL-2.0+ */ |
| /* |
| * Copyright 2018 NXP |
| */ |
| |
| #ifndef __IMX8QM_MEK_H |
| #define __IMX8QM_MEK_H |
| |
| #include <linux/sizes.h> |
| #include <asm/arch/imx-regs.h> |
| |
| #ifdef CONFIG_SPL_BUILD |
| #define CONFIG_SPL_MAX_SIZE (124 * 1024) |
| #define CONFIG_SYS_MONITOR_LEN (1024 * 1024) |
| #define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR |
| #define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x800 |
| #define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 0 |
| |
| #define CONFIG_SPL_LDSCRIPT "arch/arm/cpu/armv8/u-boot-spl.lds" |
| #define CONFIG_SPL_STACK 0x013E000 |
| #define CONFIG_SPL_BSS_START_ADDR 0x00128000 |
| #define CONFIG_SPL_BSS_MAX_SIZE 0x1000 /* 4 KB */ |
| #define CONFIG_SYS_SPL_MALLOC_START 0x00120000 |
| #define CONFIG_SYS_SPL_MALLOC_SIZE 0x3000 /* 12 KB */ |
| #define CONFIG_SERIAL_LPUART_BASE 0x5a060000 |
| #define CONFIG_MALLOC_F_ADDR 0x00120000 |
| |
| #define CONFIG_SPL_RAW_IMAGE_ARM_TRUSTED_FIRMWARE |
| |
| #define CONFIG_SPL_ABORT_ON_RAW_IMAGE |
| |
| #define CONFIG_OF_EMBED |
| #endif |
| |
| #define CONFIG_REMAKE_ELF |
| |
| #define CONFIG_BOARD_EARLY_INIT_F |
| |
| /* Flat Device Tree Definitions */ |
| #define CONFIG_OF_BOARD_SETUP |
| |
| #undef CONFIG_CMD_EXPORTENV |
| #undef CONFIG_CMD_IMPORTENV |
| #undef CONFIG_CMD_IMLS |
| |
| #undef CONFIG_CMD_CRC32 |
| |
| #define CONFIG_SYS_FSL_ESDHC_ADDR 0 |
| #define USDHC1_BASE_ADDR 0x5B010000 |
| #define USDHC2_BASE_ADDR 0x5B020000 |
| #define CONFIG_SUPPORT_EMMC_BOOT /* eMMC specific */ |
| |
| #define CONFIG_ENV_OVERWRITE |
| |
| #define CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG |
| |
| /* Initial environment variables */ |
| #define CONFIG_EXTRA_ENV_SETTINGS \ |
| "script=boot.scr\0" \ |
| "image=Image\0" \ |
| "panel=NULL\0" \ |
| "console=ttyLP0,${baudrate} earlycon=lpuart32,0x5a060000,${baudrate}\0" \ |
| "fdt_addr=0x83000000\0" \ |
| "fdt_high=0xffffffffffffffff\0" \ |
| "boot_fdt=try\0" \ |
| "fdt_file=imx8qm-mek.dtb\0" \ |
| "initrd_addr=0x83800000\0" \ |
| "initrd_high=0xffffffffffffffff\0" \ |
| "mmcdev="__stringify(CONFIG_SYS_MMC_ENV_DEV)"\0" \ |
| "mmcpart=" __stringify(CONFIG_SYS_MMC_IMG_LOAD_PART) "\0" \ |
| "mmcroot=" CONFIG_MMCROOT " rootwait rw\0" \ |
| "mmcautodetect=yes\0" \ |
| "mmcargs=setenv bootargs console=${console} root=${mmcroot}\0 " \ |
| "loadbootscript=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \ |
| "bootscript=echo Running bootscript from mmc ...; " \ |
| "source\0" \ |
| "loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \ |
| "loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \ |
| "mmcboot=echo Booting from mmc ...; " \ |
| "run mmcargs; " \ |
| "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \ |
| "if run loadfdt; then " \ |
| "booti ${loadaddr} - ${fdt_addr}; " \ |
| "else " \ |
| "echo WARN: Cannot load the DT; " \ |
| "fi; " \ |
| "else " \ |
| "echo wait for boot; " \ |
| "fi;\0" \ |
| "netargs=setenv bootargs console=${console} " \ |
| "root=/dev/nfs " \ |
| "ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \ |
| "netboot=echo Booting from net ...; " \ |
| "run netargs; " \ |
| "if test ${ip_dyn} = yes; then " \ |
| "setenv get_cmd dhcp; " \ |
| "else " \ |
| "setenv get_cmd tftp; " \ |
| "fi; " \ |
| "${get_cmd} ${loadaddr} ${image}; " \ |
| "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \ |
| "if ${get_cmd} ${fdt_addr} ${fdt_file}; then " \ |
| "booti ${loadaddr} - ${fdt_addr}; " \ |
| "else " \ |
| "echo WARN: Cannot load the DT; " \ |
| "fi; " \ |
| "else " \ |
| "booti; " \ |
| "fi;\0" |
| |
| #define CONFIG_BOOTCOMMAND \ |
| "mmc dev ${mmcdev}; if mmc rescan; then " \ |
| "if run loadbootscript; then " \ |
| "run bootscript; " \ |
| "else " \ |
| "if run loadimage; then " \ |
| "run mmcboot; " \ |
| "else run netboot; " \ |
| "fi; " \ |
| "fi; " \ |
| "else booti ${loadaddr} - ${fdt_addr}; fi" |
| |
| /* Link Definitions */ |
| #define CONFIG_LOADADDR 0x80280000 |
| |
| #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR |
| |
| #define CONFIG_SYS_INIT_SP_ADDR 0x80200000 |
| |
| /* Default environment is in SD */ |
| #define CONFIG_ENV_SIZE 0x1000 |
| #define CONFIG_ENV_OFFSET (64 * SZ_64K) |
| #define CONFIG_SYS_MMC_ENV_PART 0 /* user area */ |
| |
| #define CONFIG_SYS_MMC_IMG_LOAD_PART 1 |
| |
| /* On LPDDR4 board, USDHC1 is for eMMC, USDHC2 is for SD on CPU board */ |
| #define CONFIG_SYS_MMC_ENV_DEV 1 /* USDHC2 */ |
| #define CONFIG_MMCROOT "/dev/mmcblk1p2" /* USDHC2 */ |
| #define CONFIG_SYS_FSL_USDHC_NUM 2 |
| |
| /* Size of malloc() pool */ |
| #define CONFIG_SYS_MALLOC_LEN ((CONFIG_ENV_SIZE + (32 * 1024)) * 1024) |
| |
| #define CONFIG_SYS_SDRAM_BASE 0x80000000 |
| #define PHYS_SDRAM_1 0x80000000 |
| #define PHYS_SDRAM_2 0x880000000 |
| #define PHYS_SDRAM_1_SIZE 0x80000000 /* 2 GB */ |
| #define PHYS_SDRAM_2_SIZE 0x100000000 /* 4 GB */ |
| |
| /* Serial */ |
| #define CONFIG_BAUDRATE 115200 |
| |
| /* Generic Timer Definitions */ |
| #define COUNTER_FREQUENCY 8000000 /* 8MHz */ |
| |
| /* Networking */ |
| #define CONFIG_FEC_XCV_TYPE RGMII |
| #define FEC_QUIRK_ENET_MAC |
| |
| #endif /* __IMX8QM_MEK_H */ |