| /* |
| * Device Tree Source for the Eagle board |
| * |
| * Copyright (C) 2016-2017 Renesas Electronics Corp. |
| * Copyright (C) 2017 Cogent Embedded, Inc. |
| * |
| * This file is licensed under the terms of the GNU General Public License |
| * version 2. This program is licensed "as is" without any warranty of any |
| * kind, whether express or implied. |
| */ |
| |
| /dts-v1/; |
| #include "r8a77970.dtsi" |
| |
| / { |
| model = "Renesas Eagle board based on r8a77970"; |
| compatible = "renesas,eagle", "renesas,r8a77970"; |
| |
| aliases { |
| serial0 = &scif0; |
| ethernet0 = &avb; |
| }; |
| |
| chosen { |
| bootargs = "ignore_loglevel rw root=/dev/nfs ip=dhcp"; |
| stdout-path = "serial0:115200n8"; |
| }; |
| |
| memory@48000000 { |
| device_type = "memory"; |
| /* first 128MB is reserved for secure area. */ |
| reg = <0x0 0x48000000 0x0 0x38000000>; |
| }; |
| }; |
| |
| &extal_clk { |
| clock-frequency = <16666666>; |
| }; |
| |
| &extalr_clk { |
| clock-frequency = <32768>; |
| }; |
| |
| &pfc { |
| pinctrl-0 = <&scif_clk_pins>; |
| pinctrl-names = "default"; |
| |
| scif0_pins: scif0 { |
| groups = "scif0_data"; |
| function = "scif0"; |
| }; |
| |
| scif_clk_pins: scif_clk { |
| groups = "scif_clk_b"; |
| function = "scif_clk"; |
| }; |
| |
| avb_pins: avb { |
| groups = "avb0_mdc"; |
| function = "avb0"; |
| }; |
| }; |
| |
| &scif0 { |
| pinctrl-0 = <&scif0_pins>; |
| pinctrl-names = "default"; |
| |
| status = "okay"; |
| }; |
| |
| &scif_clk { |
| clock-frequency = <14745600>; |
| status = "okay"; |
| }; |
| |
| &avb { |
| pinctrl-0 = <&avb_pins>; |
| pinctrl-names = "default"; |
| renesas,no-ether-link; |
| phy-handle = <&phy0>; |
| status = "okay"; |
| |
| phy0: ethernet-phy@0 { |
| rxc-skew-ps = <1500>; |
| reg = <0>; |
| }; |
| }; |