| // SPDX-License-Identifier: GPL-2.0 |
| * dts file for Xilinx Versal NET |
| * Copyright (C) 2021 - 2022, Xilinx, Inc. |
| * Copyright (C) 2022, Advanced Micro Devices, Inc. |
| * Michal Simek <michal.simek@amd.com> |
| #include <dt-bindings/gpio/gpio.h> |
| compatible = "xlnx,versal-net-mini"; |
| model = "Xilinx Versal NET MINI"; |
| reg = <0 0xBBF00000 0 0x100000>, <0 0 0 0x80000000>; |
| /* serial0 = &serial0; */ |
| stdout-path = "serial0:115200"; |
| compatible = "fixed-clock"; |
| clock-frequency = <1000000>; |
| compatible = "simple-bus"; |
| serial0: serial@f1920000 { |
| compatible = "arm,pl011", "arm,primecell"; |
| reg = <0 0xf1920000 0 0x1000>; |
| clock-names = "uartclk", "apb_pclk"; |
| clocks = <&clk1>, <&clk1>; |
| current-speed = <115200>; |