board/mpc8641hpcn/oftree.dts

/*
 * MPC8641 HPCN Device Tree Source
 *
 * Copyright 2006 Freescale Semiconductor Inc.
 *
 * This program is free software; you can redistribute  it and/or modify it
 * under  the terms of  the GNU General  Public License as published by the
 * Free Software Foundation;  either version 2 of the  License, or (at your
 * option) any later version.
 */


/ {
	model = "MPC8641HPCN";
	compatible = "mpc86xx";
	#address-cells = <1>;
	#size-cells = <1>;
	linux,phandle = <100>;

	cpus {
		#cpus = <1>;
		#address-cells = <1>;
		#size-cells = <0>;
		linux,phandle = <200>;

		PowerPC,8641@0 {
			device_type = "cpu";
			reg = <0>;
			d-cache-line-size = <20>;	// 32 bytes
			i-cache-line-size = <20>;	// 32 bytes
			d-cache-size = <8000>;		// L1, 32K
			i-cache-size = <8000>;		// L1, 32K
			timebase-frequency = <0>;	//  33 MHz, from uboot
			bus-frequency = <0>;	// 166 MHz
			clock-frequency = <0>;	// 825 MHz, from uboot
			32-bit;
			linux,phandle = <201>;
			linux,boot-cpu;
		};
	};

	memory {
		device_type = "memory";
		linux,phandle = <300>;
		reg = <00000000 10000000>;	// 256M at 0x0
	};

	soc8641@f8000000 {
		#address-cells = <1>;
		#size-cells = <1>;
		#interrupt-cells = <2>;
		device_type = "soc";
		ranges = <0 f8000000 00100000>;
		reg = <f8000000 00100000>;	// CCSRBAR 1M
		bus-frequency = <0>;

		i2c@3000 {
			device_type = "i2c";
			compatible = "fsl-i2c";
			reg = <3000 100>;
			interrupts = <2b 0>;
			interrupt-parent = <40000>;
			dfsrr;
		};

		mdio@24520 {
			#address-cells = <1>;
			#size-cells = <0>;
			device_type = "mdio";
			compatible = "gianfar";
			reg = <24520 20>;
			linux,phandle = <24520>;
			ethernet-phy@0 {
				linux,phandle = <2452000>;
				interrupt-parent = <40000>;
				interrupts = <a 0>;
				reg = <0>;
				device_type = "ethernet-phy";
			};
			ethernet-phy@1 {
				linux,phandle = <2452001>;
				interrupt-parent = <40000>;
				interrupts = <a 0>;
				reg = <1>;
				device_type = "ethernet-phy";
			};
			ethernet-phy@2 {
				linux,phandle = <2452002>;
				interrupt-parent = <40000>;
				interrupts = <a 0>;
				reg = <2>;
				device_type = "ethernet-phy";
			};
			ethernet-phy@3 {
				linux,phandle = <2452003>;
				interrupt-parent = <40000>;
				interrupts = <a 0>;
				reg = <3>;
				device_type = "ethernet-phy";
			};
		};

		ethernet@24000 {
			#address-cells = <1>;
			#size-cells = <0>;
			device_type = "network";
			model = "TSEC";
			compatible = "gianfar";
			reg = <24000 1000>;
			address = [ 00 E0 0C 00 73 00 ];
			interrupts = <1d 3 1e 3 22 3>;
			interrupt-parent = <40000>;
			phy-handle = <2452000>;
		};

		ethernet@25000 {
			#address-cells = <1>;
			#size-cells = <0>;
			device_type = "network";
			model = "TSEC";
			compatible = "gianfar";
			reg = <25000 1000>;
			address = [ 00 E0 0C 00 73 01 ];
			interrupts = <23 3 24 3 28 3>;
			interrupt-parent = <40000>;
			phy-handle = <2452001>;
		};
		
		ethernet@26000 {
			#address-cells = <1>;
			#size-cells = <0>;
			device_type = "network";
			model = "TSEC";
			compatible = "gianfar";
			reg = <26000 1000>;
			address = [ 00 E0 0C 00 02 FD ];
			interrupts = <1F 3 20 3 21 3>;
			interrupt-parent = <40000>;
			phy-handle = <2452002>;
		};

		ethernet@27000 {
			#address-cells = <1>;
			#size-cells = <0>;
			device_type = "network";
			model = "TSEC";
			compatible = "gianfar";
			reg = <27000 1000>;
			address = [ 00 E0 0C 00 03 FD ];
			interrupts = <25 3 26 3 27 3>;
			interrupt-parent = <40000>;
			phy-handle = <2452003>;
		};
		serial@4500 {
			device_type = "serial";
			compatible = "ns16550"; 
			reg = <4500 100>; 	// reg base, size
			clock-frequency = <0>; 	// should we fill in in uboot?
			interrupts = <2a 3>;
			interrupt-parent = <40000>;
		};

		serial@4600 {
			device_type = "serial";
			compatible = "ns16550";
			reg = <4600 100>;	// reg base, size
			clock-frequency = <0>; 	// should we fill in in uboot?
			interrupts = <2a 3>;
			interrupt-parent = <40000>;
		};

		pic@40000 {
			linux,phandle = <40000>;
			clock-frequency = <0>;
			interrupt-controller;
			#address-cells = <0>;
			#interrupt-cells = <2>;
			reg = <40000 40000>;
			built-in;
			compatible = "chrp,open-pic";
			device_type = "open-pic";
                        big-endian;
		};
	};
};