blob: c8b72ebf05e84aa3e16c36b6461f360a8b3c3bd5 [file] [log] [blame]
menu "Xtensa architecture"
depends on XTENSA
config SYS_ARCH
string
default "xtensa"
config SYS_CPU
string "Xtensa Core Variant"
choice
prompt "Target select"
config TARGET_XTFPGA
bool "Support XTFPGA"
endchoice
config SYS_ICACHE_OFF
bool "Do not enable icache"
default n
help
Do not enable instruction cache in U-Boot.
config SYS_DCACHE_OFF
bool "Do not enable dcache"
default n
help
Do not enable data cache in U-Boot.
source "board/cadence/xtfpga/Kconfig"
endmenu