| // SPDX-License-Identifier: BSD-2-Clause-Patent |
| // |
| // Copyright (c) 2021, Linaro Limited. All rights reserved. |
| // |
| |
| / { |
| aliases { |
| spi_nor = &spi_nor; |
| i2c0 = &i2c0; |
| }; |
| |
| spi_nor: spi@54800000 { |
| compatible = "socionext,synquacer-spi"; |
| reg = <0x00 0x54800000 0x00 0x1000>; |
| interrupts = <0x00 0x9c 0x04 0x00 0x9d 0x04 0x00 0x9e 0x04>; |
| clocks = <&clk_alw_1_8>; |
| clock-names = "iHCLK"; |
| socionext,use-rtm; |
| socionext,set-aces; |
| #address-cells = <1>; |
| #size-cells = <0>; |
| status = "okay"; |
| |
| flash@0 { |
| #address-cells = <1>; |
| #size-cells = <1>; |
| compatible = "jedec,spi-nor"; |
| reg = <0>; /* Chip select 0 */ |
| spi-max-frequency = <31250000>; |
| spi-rx-bus-width = <0x1>; |
| spi-tx-bus-width = <0x1>; |
| |
| partitions { |
| compatible = "fixed-partitions"; |
| #address-cells = <1>; |
| #size-cells = <1>; |
| |
| partition@0 { |
| label = "BootStrap-BL1"; |
| reg = <0x0 0x70000>; |
| read-only; |
| }; |
| |
| partition@70000 { |
| label = "Flash-Writer"; |
| reg = <0x70000 0x90000>; |
| read-only; |
| }; |
| |
| partition@100000 { |
| label = "SCP-BL2"; |
| reg = <0x100000 0x80000>; |
| read-only; |
| }; |
| |
| partition@180000 { |
| label = "FIP-TFA"; |
| reg = <0x180000 0x78000>; |
| }; |
| |
| partition@1f8000 { |
| label = "Stage2Tables"; |
| reg = <0x1f8000 0x8000>; |
| }; |
| |
| partition@200000 { |
| label = "U-Boot"; |
| reg = <0x200000 0x100000>; |
| }; |
| |
| partition@300000 { |
| label = "UBoot-Env"; |
| reg = <0x300000 0x100000>; |
| }; |
| |
| partition@500000 { |
| label = "Ex-OPTEE"; |
| reg = <0x500000 0x200000>; |
| }; |
| }; |
| }; |
| }; |
| |
| i2c0: i2c@51200000 { |
| compatible = "socionext,synquacer-i2c"; |
| reg = <0x0 0x51200000 0x0 0x1000>; |
| interrupts = <GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>; |
| clocks = <&clk_i2c>; |
| clock-names = "pclk"; |
| clock-frequency = <400000>; |
| #address-cells = <1>; |
| #size-cells = <0>; |
| status = "okay"; |
| |
| pcf8563: rtc@51 { |
| compatible = "nxp,pcf8563"; |
| reg = <0x51>; |
| }; |
| }; |
| |
| firmware { |
| optee { |
| status = "okay"; |
| }; |
| }; |
| }; |
| |
| &smmu { |
| status = "okay"; |
| }; |
| |
| &pcie0 { |
| status = "okay"; |
| }; |
| |
| &pcie1 { |
| status = "okay"; |
| }; |
| |
| &sdhci { |
| status = "okay"; |
| }; |