| CONFIG_ARM=y |
| CONFIG_ARCH_IMX8M=y |
| CONFIG_SYS_TEXT_BASE=0x40200000 |
| CONFIG_SYS_MALLOC_LEN=0x2000000 |
| CONFIG_SPL_GPIO=y |
| CONFIG_SPL_LIBCOMMON_SUPPORT=y |
| CONFIG_SPL_LIBGENERIC_SUPPORT=y |
| CONFIG_NR_DRAM_BANKS=3 |
| CONFIG_ENV_SIZE=0x2000 |
| CONFIG_ENV_OFFSET=0x400000 |
| CONFIG_ENV_SECT_SIZE=0x10000 |
| CONFIG_IMX_CONFIG="board/advantech/imx8mp_rsb3720a1/imximage-8mp-lpddr4.cfg" |
| CONFIG_DM_GPIO=y |
| CONFIG_DEFAULT_DEVICE_TREE="imx8mp-rsb3720-a1" |
| CONFIG_SPL_TEXT_BASE=0x920000 |
| CONFIG_TARGET_IMX8MP_RSB3720A1_4G=y |
| CONFIG_SYS_PROMPT="u-boot=> " |
| CONFIG_SPL_MMC=y |
| CONFIG_SPL_SERIAL=y |
| CONFIG_SPL_DRIVERS_MISC=y |
| CONFIG_SPL=y |
| CONFIG_IMX_BOOTAUX=y |
| CONFIG_SPL_IMX_ROMAPI_LOADADDR=0x48000000 |
| CONFIG_SYS_LOAD_ADDR=0x40480000 |
| CONFIG_DISTRO_DEFAULTS=y |
| CONFIG_REMAKE_ELF=y |
| CONFIG_FIT=y |
| CONFIG_FIT_EXTERNAL_OFFSET=0x3000 |
| CONFIG_FIT_SIGNATURE=y |
| CONFIG_SPL_LOAD_FIT=y |
| # CONFIG_USE_SPL_FIT_GENERATOR is not set |
| CONFIG_OF_BOARD_SETUP=y |
| CONFIG_OF_SYSTEM_SETUP=y |
| CONFIG_DEFAULT_FDT_FILE="imx8mp-rsb3720-a1.dtb" |
| CONFIG_ARCH_MISC_INIT=y |
| CONFIG_BOARD_EARLY_INIT_F=y |
| CONFIG_BOARD_LATE_INIT=y |
| CONFIG_SPL_MAX_SIZE=0x26000 |
| CONFIG_SPL_HAS_BSS_LINKER_SECTION=y |
| CONFIG_SPL_BSS_START_ADDR=0x98fc00 |
| CONFIG_SPL_BSS_MAX_SIZE=0x400 |
| CONFIG_SPL_BOARD_INIT=y |
| CONFIG_SPL_BOOTROM_SUPPORT=y |
| CONFIG_SPL_SYS_MALLOC_SIMPLE=y |
| # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set |
| CONFIG_SPL_STACK=0x960000 |
| CONFIG_SYS_SPL_MALLOC=y |
| CONFIG_HAS_CUSTOM_SPL_MALLOC_START=y |
| CONFIG_CUSTOM_SYS_SPL_MALLOC_ADDR=0x42200000 |
| CONFIG_SYS_SPL_MALLOC_SIZE=0x80000 |
| CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y |
| CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x300 |
| CONFIG_SPL_I2C=y |
| CONFIG_SPL_POWER=y |
| CONFIG_SPL_WATCHDOG=y |
| CONFIG_SYS_MAXARGS=64 |
| CONFIG_SYS_CBSIZE=2048 |
| CONFIG_SYS_PBSIZE=2074 |
| CONFIG_SYS_BOOTM_LEN=0x2000000 |
| CONFIG_CMD_BOOTEFI_SELFTEST=y |
| CONFIG_CMD_ERASEENV=y |
| CONFIG_CMD_NVEDIT_EFI=y |
| CONFIG_CMD_EEPROM=y |
| CONFIG_CMD_MEMTEST=y |
| CONFIG_CMD_SHA1SUM=y |
| CONFIG_CMD_BIND=y |
| CONFIG_CMD_CLK=y |
| CONFIG_CMD_DFU=y |
| CONFIG_CMD_FUSE=y |
| CONFIG_CMD_GPIO=y |
| CONFIG_CMD_GPT=y |
| CONFIG_CMD_I2C=y |
| CONFIG_CMD_MMC=y |
| CONFIG_CMD_READ=y |
| CONFIG_CMD_SNTP=y |
| CONFIG_CMD_BMP=y |
| CONFIG_CMD_CACHE=y |
| CONFIG_CMD_EFIDEBUG=y |
| CONFIG_CMD_RTC=y |
| CONFIG_CMD_TIME=y |
| CONFIG_CMD_GETTIME=y |
| CONFIG_CMD_TIMER=y |
| CONFIG_CMD_REGULATOR=y |
| CONFIG_CMD_EXT4_WRITE=y |
| CONFIG_OF_CONTROL=y |
| CONFIG_SPL_OF_CONTROL=y |
| CONFIG_ENV_OVERWRITE=y |
| CONFIG_ENV_IS_IN_MMC=y |
| CONFIG_ENV_IS_IN_SPI_FLASH=y |
| CONFIG_SYS_RELOC_GD_ENV_ADDR=y |
| CONFIG_SYS_MMC_ENV_DEV=2 |
| CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y |
| CONFIG_USE_ETHPRIME=y |
| CONFIG_ETHPRIME="eth1" |
| CONFIG_NET_RANDOM_ETHADDR=y |
| CONFIG_SPL_DM=y |
| CONFIG_REGMAP=y |
| CONFIG_SYSCON=y |
| CONFIG_CLK_COMPOSITE_CCF=y |
| CONFIG_CLK_IMX8MP=y |
| CONFIG_DFU_TFTP=y |
| CONFIG_DFU_MMC=y |
| CONFIG_DFU_RAM=y |
| CONFIG_DFU_SF=y |
| CONFIG_UDP_FUNCTION_FASTBOOT=y |
| CONFIG_FASTBOOT_BUF_ADDR=0x42800000 |
| CONFIG_FASTBOOT_BUF_SIZE=0x5000000 |
| CONFIG_FASTBOOT_FLASH=y |
| CONFIG_FASTBOOT_UUU_SUPPORT=y |
| CONFIG_FASTBOOT_FLASH_MMC_DEV=2 |
| CONFIG_MXC_GPIO=y |
| CONFIG_DM_PCA953X=y |
| CONFIG_DM_I2C=y |
| CONFIG_LED=y |
| CONFIG_LED_GPIO=y |
| CONFIG_SUPPORT_EMMC_RPMB=y |
| CONFIG_SUPPORT_EMMC_BOOT=y |
| CONFIG_MMC_IO_VOLTAGE=y |
| CONFIG_MMC_UHS_SUPPORT=y |
| CONFIG_MMC_HS400_ES_SUPPORT=y |
| CONFIG_MMC_HS400_SUPPORT=y |
| CONFIG_FSL_USDHC=y |
| CONFIG_DM_SPI_FLASH=y |
| CONFIG_SF_DEFAULT_MODE=0 |
| CONFIG_SF_DEFAULT_SPEED=40000000 |
| CONFIG_SPI_FLASH_BAR=y |
| CONFIG_SPI_FLASH_STMICRO=y |
| CONFIG_PHY_REALTEK=y |
| CONFIG_DM_ETH_PHY=y |
| CONFIG_PHY_GIGE=y |
| CONFIG_DWC_ETH_QOS=y |
| CONFIG_DWC_ETH_QOS_IMX=y |
| CONFIG_FEC_MXC=y |
| CONFIG_MII=y |
| CONFIG_PINCTRL=y |
| CONFIG_SPL_PINCTRL=y |
| CONFIG_PINCTRL_IMX8M=y |
| CONFIG_DM_PMIC=y |
| CONFIG_DM_PMIC_PCA9450=y |
| CONFIG_SPL_DM_PMIC_PCA9450=y |
| CONFIG_DM_REGULATOR=y |
| CONFIG_SPL_DM_REGULATOR=y |
| CONFIG_DM_REGULATOR_FIXED=y |
| CONFIG_SPL_DM_REGULATOR_FIXED=y |
| CONFIG_DM_REGULATOR_GPIO=y |
| CONFIG_SPL_DM_REGULATOR_GPIO=y |
| CONFIG_DM_RTC=y |
| CONFIG_RTC_S35392A=y |
| CONFIG_DM_SERIAL=y |
| CONFIG_MXC_UART=y |
| CONFIG_SPI=y |
| CONFIG_DM_SPI=y |
| CONFIG_SYSRESET=y |
| CONFIG_SPL_SYSRESET=y |
| CONFIG_SYSRESET_PSCI=y |
| CONFIG_SYSRESET_WATCHDOG=y |
| CONFIG_DM_THERMAL=y |
| CONFIG_VIDEO=y |
| CONFIG_SYS_WHITE_ON_BLACK=y |
| CONFIG_IMX_WATCHDOG=y |
| CONFIG_SHA384=y |
| CONFIG_LZO=y |
| CONFIG_BZIP2=y |
| CONFIG_OF_LIBFDT_OVERLAY=y |
| CONFIG_EFI_SET_TIME=y |
| CONFIG_EFI_RUNTIME_UPDATE_CAPSULE=y |
| CONFIG_EFI_CAPSULE_ON_DISK=y |
| CONFIG_EFI_CAPSULE_FIRMWARE_FIT=y |
| CONFIG_EFI_SECURE_BOOT=y |