clk: renesas: Add R8A779A0 clock tables
Add clock tables for R8A779A0 V3U SoC from Linux 5.12,
commit 9f4ad9e425a1 ("Linux 5.12")
Signed-off-by: Hai Pham <hai.pham.ud@renesas.com>
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
--
Marek: - Add .reset_modemr_offset
- Sync tables from Linux 5.12
- Rebase on latest u-boot
diff --git a/drivers/clk/renesas/clk-rcar-gen3.c b/drivers/clk/renesas/clk-rcar-gen3.c
index c7dba34..6cf07fb 100644
--- a/drivers/clk/renesas/clk-rcar-gen3.c
+++ b/drivers/clk/renesas/clk-rcar-gen3.c
@@ -418,6 +418,11 @@
priv->info->control_regs = smstpcr;
priv->info->reset_regs = srcr;
priv->info->reset_clear_regs = srstclr;
+ } else if (info->reg_layout == CLK_REG_LAYOUT_RCAR_V3U) {
+ priv->info->status_regs = mstpsr_for_v3u;
+ priv->info->control_regs = mstpcr_for_v3u;
+ priv->info->reset_regs = srcr_for_v3u;
+ priv->info->reset_clear_regs = srstclr_for_v3u;
} else {
return -EINVAL;
}