| /* | |
| * MIPS Coherence Manager (CM) Register Definitions | |
| * | |
| * Copyright (c) 2016 Imagination Technologies Ltd. | |
| * | |
| * SPDX-License-Identifier: GPL-2.0+ | |
| */ | |
| #ifndef __MIPS_ASM_CM_H__ | |
| #define __MIPS_ASM_CM_H__ | |
| /* Global Control Register (GCR) offsets */ | |
| #define GCR_BASE 0x0008 | |
| #define GCR_BASE_UPPER 0x000c | |
| #define GCR_REV 0x0030 | |
| /* GCR_REV CM versions */ | |
| #define GCR_REV_CM3 0x0800 | |
| #endif /* __MIPS_ASM_CM_H__ */ |