| commit | b3e2d9fccbe7390a859f7f46001c6312cc35455c | [log] [tgz] |
|---|---|---|
| author | Chee Hong Ang <chee.hong.ang@intel.com> | Wed Aug 05 21:15:57 2020 +0800 |
| committer | Ley Foon Tan <ley.foon.tan@intel.com> | Fri Oct 09 17:53:11 2020 +0800 |
| tree | 54fb5133a8eb0b7a9fb7d1c4377ec2c825c70764 | |
| parent | d7a1ff40d6006c818c9e74d3e13bec008638349f [diff] |
arm: socfpga: soc64: Show reset state in SPL Print reset state (warm/cold) together with the source (watchdog/MPU) which has triggered the warm reset on S10 & Agilex. Signed-off-by: Chee Hong Ang <chee.hong.ang@intel.com> Reviewed-by: Ley Foon Tan <ley.foon.tan@intel.com>