| // SPDX-License-Identifier: GPL-2.0 |
| * dts file for Xilinx Versal Mini eMMC0 Configuration |
| * (C) Copyright 2018-2019, Xilinx, Inc. |
| * Siva Durga Prasad <siva.durga.paladugu@xilinx.com> |
| * Michal Simek <michal.simek@xilinx.com> |
| compatible = "xlnx,versal"; |
| model = "Xilinx Versal MINI eMMC0"; |
| compatible = "fixed-clock"; |
| clock-frequency = <200000000>; |
| compatible = "simple-bus"; |
| compatible = "xlnx,versal-8.9a", "arasan,sdhci-8.9a"; |
| reg = <0x0 0xf1040000 0x0 0x10000>; |
| clock-names = "clk_xin", "clk_ahb"; |
| clocks = <&clk200 &clk200>; |
| stdout-path = "serial0:115200"; |
| reg = <0x0 0x0 0x0 0x20000000>; |