| menu "RISC-V architecture" |
| depends on RISCV |
| |
| config SYS_ARCH |
| default "riscv" |
| |
| choice |
| prompt "Target select" |
| optional |
| |
| config TARGET_AX25_AE350 |
| bool "Support ax25-ae350" |
| |
| config TARGET_QEMU_VIRT |
| bool "Support QEMU Virt Board" |
| |
| endchoice |
| |
| source "board/AndesTech/ax25-ae350/Kconfig" |
| source "board/emulation/qemu-riscv/Kconfig" |
| |
| choice |
| prompt "Base ISA" |
| default ARCH_RV32I |
| |
| config ARCH_RV32I |
| bool "RV32I" |
| select 32BIT |
| help |
| Choose this option to target the RV32I base integer instruction set. |
| |
| config ARCH_RV64I |
| bool "RV64I" |
| select 64BIT |
| select PHYS_64BIT |
| help |
| Choose this option to target the RV64I base integer instruction set. |
| |
| endchoice |
| |
| config RISCV_ISA_C |
| bool "Emit compressed instructions" |
| default y |
| help |
| Adds "C" to the ISA subsets that the toolchain is allowed to emit |
| when building U-Boot, which results in compressed instructions in the |
| U-Boot binary. |
| |
| config RISCV_ISA_A |
| def_bool y |
| |
| config 32BIT |
| bool |
| |
| config 64BIT |
| bool |
| |
| endmenu |