| // SPDX-License-Identifier: GPL-2.0+ |
| /* |
| * Copyright 2019 NXP |
| */ |
| |
| &{/soc} { |
| u-boot,dm-pre-reloc; |
| u-boot,dm-spl; |
| }; |
| |
| &clk { |
| u-boot,dm-spl; |
| u-boot,dm-pre-reloc; |
| }; |
| |
| &osc_24m { |
| u-boot,dm-spl; |
| u-boot,dm-pre-reloc; |
| }; |
| |
| &aips1 { |
| u-boot,dm-spl; |
| u-boot,dm-pre-reloc; |
| }; |
| |
| &aips2 { |
| u-boot,dm-spl; |
| }; |
| |
| &aips3 { |
| u-boot,dm-spl; |
| }; |
| |
| &iomuxc { |
| u-boot,dm-spl; |
| }; |
| |
| &pinctrl_reg_usdhc2_vmmc { |
| u-boot,dm-spl; |
| }; |
| |
| &pinctrl_uart2 { |
| u-boot,dm-spl; |
| }; |
| |
| &pinctrl_usdhc2_gpio { |
| u-boot,dm-spl; |
| }; |
| |
| &pinctrl_usdhc2 { |
| u-boot,dm-spl; |
| }; |
| |
| &pinctrl_usdhc3 { |
| u-boot,dm-spl; |
| }; |
| |
| &gpio1 { |
| u-boot,dm-spl; |
| }; |
| |
| &gpio2 { |
| u-boot,dm-spl; |
| }; |
| |
| &gpio3 { |
| u-boot,dm-spl; |
| }; |
| |
| &gpio4 { |
| u-boot,dm-spl; |
| }; |
| |
| &gpio5 { |
| u-boot,dm-spl; |
| }; |
| |
| &uart2 { |
| u-boot,dm-spl; |
| }; |
| |
| &usdhc1 { |
| u-boot,dm-spl; |
| }; |
| |
| &usdhc2 { |
| u-boot,dm-spl; |
| }; |
| |
| &usdhc3 { |
| u-boot,dm-spl; |
| }; |
| |
| &i2c1 { |
| u-boot,dm-spl; |
| }; |
| |
| &{/soc@0/bus@30800000/i2c@30a20000/pmic@4b} { |
| u-boot,dm-spl; |
| }; |
| |
| &{/soc@0/bus@30800000/i2c@30a20000/pmic@4b/regulators} { |
| u-boot,dm-spl; |
| }; |
| |
| &pinctrl_i2c1 { |
| u-boot,dm-spl; |
| }; |
| |
| &pinctrl_pmic { |
| u-boot,dm-spl; |
| }; |