clk/qcom: use function pointers for enable and set_rate
Currently, it isn't possible to build clock drivers for more than one
platform due to how the msm_enable() and msm_set_rate() callbacks are
implemented.
Extend qcom_clk_data to include function pointers for these and convert
all platforms to use them.
Previously, clock drivers relied on include/configs/<board.h> to include the
board specific sysmap header, however as most of the header contents are clock
driver related, import the contents directly into each clock driver and
remove the header. The only exception here is the dragonboard820c board file
which includes some pinctrl macros, those are also inlined.
Reviewed-by: Sumit Garg <sumit.garg@linaro.org>
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
[caleb: remove additional sysmap-sdm845.h mention]
diff --git a/drivers/clk/qcom/clock-sdm845.c b/drivers/clk/qcom/clock-sdm845.c
index 57124e2..fc9a783 100644
--- a/drivers/clk/qcom/clock-sdm845.c
+++ b/drivers/clk/qcom/clock-sdm845.c
@@ -19,6 +19,14 @@
#include "clock-qcom.h"
+#define SE9_AHB_CBCR 0x25004
+#define SE9_UART_APPS_CBCR 0x29004
+#define SE9_UART_APPS_CMD_RCGR 0x18148
+#define SE9_UART_APPS_CFG_RCGR 0x1814C
+#define SE9_UART_APPS_M 0x18150
+#define SE9_UART_APPS_N 0x18154
+#define SE9_UART_APPS_D 0x18158
+
#define F(f, s, h, m, n) { (f), (s), (2 * (h) - 1), (m), (n) }
struct freq_tbl {
@@ -72,7 +80,7 @@
return f - 1;
}
-ulong msm_set_rate(struct clk *clk, ulong rate)
+static ulong sdm845_clk_set_rate(struct clk *clk, ulong rate)
{
struct msm_clk_priv *priv = dev_get_priv(clk->dev);
const struct freq_tbl *freq;
@@ -148,7 +156,7 @@
GATE_CLK(GCC_USB_PHY_CFG_AHB2PHY_CLK, 0x6a004, 0x00000001),
};
-int msm_enable(struct clk *clk)
+static int sdm845_clk_enable(struct clk *clk)
{
struct msm_clk_priv *priv = dev_get_priv(clk->dev);
@@ -179,17 +187,20 @@
[GCC_USB_PHY_CFG_AHB2PHY_BCR] = { 0x6a000 },
};
-static const struct msm_clk_data qcs404_gcc_data = {
+static struct msm_clk_data sdm845_clk_data = {
.resets = sdm845_gcc_resets,
.num_resets = ARRAY_SIZE(sdm845_gcc_resets),
.clks = sdm845_clks,
.num_clks = ARRAY_SIZE(sdm845_clks),
+
+ .enable = sdm845_clk_enable,
+ .set_rate = sdm845_clk_set_rate,
};
static const struct udevice_id gcc_sdm845_of_match[] = {
{
.compatible = "qcom,gcc-sdm845",
- .data = (ulong)&qcs404_gcc_data,
+ .data = (ulong)&sdm845_clk_data,
},
{ }
};