arch/arm/dts/imx8mp-dhcom-som-overlay-eth1xfast.dts

// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
/*
 * Copyright (C) 2023 Marek Vasut <marex@denx.de>
 */
/dts-v1/;
/plugin/;

#include <dt-bindings/clock/imx8mp-clock.h>

&eqos {	/* First ethernet */
	pinctrl-0 = <&pinctrl_eqos_rmii>;
	phy-handle = <&ethphy0f>;
	phy-mode = "rmii";

	assigned-clock-parents = <&clk IMX8MP_SYS_PLL1_266M>,
				 <&clk IMX8MP_SYS_PLL2_100M>,
				 <&clk IMX8MP_SYS_PLL2_50M>;
	assigned-clock-rates = <0>, <100000000>, <50000000>;
};

&ethphy0g {	/* Micrel KSZ9131RNXI */
	status = "disabled";
};

&ethphy0f {	/* SMSC LAN8740Ai */
	status = "okay";
};

&fec {	/* Second ethernet -- HS connector not populated on 1x RMII PHY SoM */
	status = "disabled";
};

/* No WiFi/BT chipset on this SoM variant. */

&uart2 {
	bluetooth {
		status = "disabled";
	};
};

&usdhc1 {
	status = "disabled";
};