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config USB_DWC3
bool "DesignWare USB3 DRD Core Support"
depends on USB_XHCI_HCD || USB_GADGET
help
Say Y here if your system has a Dual Role SuperSpeed
USB controller based on the DesignWare USB3 IP Core.
if USB_DWC3
config USB_DWC3_GADGET
bool "USB Gadget support for DWC3"
default y
depends on USB_GADGET
select USB_GADGET_DUALSPEED
comment "Platform Glue Driver Support"
config USB_DWC3_OMAP
bool "Texas Instruments OMAP5 and similar Platforms"
help
Some platforms from Texas Instruments like OMAP5, DRA7xxx and
AM437x use this IP for USB2/3 functionality.
Say 'Y' here if you have one such device
config USB_DWC3_GENERIC
bool "Generic implementation of a DWC3 wrapper (aka dwc3 glue)"
depends on DM_USB && USB_DWC3 && MISC
help
Select this for Xilinx ZynqMP and similar Platforms.
This wrapper supports Host and Peripheral operation modes.
config USB_DWC3_MESON_G12A
bool "Amlogic Meson G12A USB wrapper"
depends on DM_USB && USB_DWC3 && ARCH_MESON
imply PHY
help
Select this for Amlogic Meson G12A Platforms.
This wrapper supports Host and Peripheral operation modes.
config USB_DWC3_MESON_GXL
bool "Amlogic Meson GXL USB wrapper"
depends on DM_USB && USB_DWC3 && ARCH_MESON
imply PHY
help
Select this for Amlogic Meson GXL and GXM Platforms.
This wrapper supports Host and Peripheral operation modes.
config USB_DWC3_UNIPHIER
bool "DesignWare USB3 Host Support on UniPhier Platforms"
depends on ARCH_UNIPHIER && USB_XHCI_DWC3
help
Support of USB2/3 functionality in Socionext UniPhier platforms.
Say 'Y' here if you have one such device.
config USB_DWC3_LAYERSCAPE
bool "Freescale Layerscape platform support"
depends on DM_USB && USB_DWC3
depends on !USB_XHCI_FSL
help
Select this for Freescale Layerscape Platforms.
Host and Peripheral operation modes are supported. OTG is not
supported.
menu "PHY Subsystem"
config USB_DWC3_PHY_OMAP
bool "TI OMAP SoC series USB DRD PHY driver"
help
Enable single driver for both USB2 PHY programming and USB3 PHY
programming for TI SoCs.
config USB_DWC3_PHY_SAMSUNG
bool "Exynos5 SoC series USB DRD PHY driver"
help
Enable USB DRD PHY support for Exynos 5 SoC series.
This driver provides PHY interface for USB 3.0 DRD controller
present on Exynos5 SoC series.
endmenu
endif