blob: fa31c838d34dba6303704be61de7300557a73c8f [file] [log] [blame]
// SPDX-License-Identifier: GPL-2.0+
/*
*(C) Copyright 2019 Rockchip Electronics Co., Ltd
*/
#include "rockchip-u-boot.dtsi"
/ {
aliases {
mmc0 = &emmc;
mmc1 = &sdmmc;
};
otp: nvmem@ff210000 {
compatible = "rockchip,rk3308-otp";
reg = <0x0 0xff210000 0x0 0x4000>;
clocks = <&cru SCLK_OTP_USR>, <&cru PCLK_OTP_NS>,
<&cru PCLK_OTP_PHY>;
clock-names = "otp", "apb_pclk", "phy";
resets = <&cru SRST_OTP_PHY>;
reset-names = "phy";
#address-cells = <1>;
#size-cells = <1>;
cpu_id: id@7 {
reg = <0x07 0x10>;
};
};
rng: rng@ff2f0000 {
compatible = "rockchip,cryptov2-rng";
reg = <0x0 0xff2f0000 0x0 0x4000>;
};
};
&cru {
bootph-all;
};
&dmc {
bootph-all;
};
&emmc {
/* mmc to sram can't do dma, prevent aborts transferring TF-A parts */
u-boot,spl-fifo-mode;
bootph-all;
};
&sdmmc {
bootph-all;
u-boot,spl-fifo-mode;
};
&grf {
bootph-all;
};
&saradc {
bootph-all;
status = "okay";
};