| /* SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) */ |
| /* |
| * Copyright (C) STMicroelectronics 2017 - All Rights Reserved |
| * Author: Ludovic Barre <ludovic.barre@st.com> for STMicroelectronics. |
| */ |
| |
| /dts-v1/; |
| |
| #include "stm32mp157.dtsi" |
| #include <dt-bindings/gpio/gpio.h> |
| #include <dt-bindings/input/input.h> |
| #include <dt-bindings/pinctrl/stm32-pinfunc.h> |
| |
| / { |
| model = "STMicroelectronics STM32MP157C pmic eval daughter"; |
| compatible = "st,stm32mp157c-ed1", "st,stm32mp157"; |
| |
| chosen { |
| bootargs = "earlyprintk console=ttyS3,115200 root=/dev/ram"; |
| stdout-path = "serial3:115200n8"; |
| }; |
| |
| memory { |
| reg = <0xC0000000 0x40000000>; |
| }; |
| }; |
| |
| &gpioa { |
| status = "okay"; |
| }; |
| |
| &gpiob { |
| status = "okay"; |
| }; |
| |
| &gpioc { |
| status = "okay"; |
| }; |
| |
| &gpiod { |
| status = "okay"; |
| }; |
| |
| &gpioe { |
| status = "okay"; |
| }; |
| |
| &gpiof { |
| status = "okay"; |
| }; |
| |
| &gpiog { |
| status = "okay"; |
| }; |
| |
| &gpioh { |
| status = "okay"; |
| }; |
| |
| &gpioi { |
| status = "okay"; |
| }; |
| |
| &gpioj { |
| status = "okay"; |
| }; |
| |
| &gpiok { |
| status = "okay"; |
| }; |
| |
| &gpioz { |
| status = "okay"; |
| }; |
| |
| &pinctrl { |
| uart4_pins_a: uart4@0 { |
| pins1 { |
| pinmux = <STM32_PINMUX('G', 11, AF6)>; /* UART4_TX */ |
| bias-disable; |
| drive-push-pull; |
| slew-rate = <0>; |
| }; |
| pins2 { |
| pinmux = <STM32_PINMUX('B', 2, AF8)>; /* UART4_RX */ |
| bias-disable; |
| }; |
| }; |
| |
| sdmmc1_b4_pins_a: sdmmc1-b4@0 { |
| pins { |
| pinmux = <STM32_PINMUX('C', 8, AF12)>, /* SDMMC1_D0 */ |
| <STM32_PINMUX('C', 9, AF12)>, /* SDMMC1_D1 */ |
| <STM32_PINMUX('C', 10, AF12)>, /* SDMMC1_D2 */ |
| <STM32_PINMUX('C', 11, AF12)>, /* SDMMC1_D3 */ |
| <STM32_PINMUX('C', 12, AF12)>, /* SDMMC1_CK */ |
| <STM32_PINMUX('D', 2, AF12)>; /* SDMMC1_CMD */ |
| slew-rate = <3>; |
| drive-push-pull; |
| bias-disable; |
| }; |
| }; |
| |
| sdmmc1_dir_pins_a: sdmmc1-dir@0 { |
| pins { |
| pinmux = <STM32_PINMUX('F', 2, AF11)>, /* SDMMC1_D0DIR */ |
| <STM32_PINMUX('C', 7, AF8)>, /* SDMMC1_D123DIR */ |
| <STM32_PINMUX('B', 9, AF11)>, /* SDMMC1_CDIR */ |
| <STM32_PINMUX('E', 4, AF8)>; /* SDMMC1_CKIN */ |
| slew-rate = <3>; |
| drive-push-pull; |
| bias-pull-up; |
| }; |
| }; |
| }; |
| |
| &pinctrl_z { |
| i2c4_pins_a: i2c4@0 { |
| pins { |
| pinmux = <STM32_PINMUX('Z', 4, AF6)>, /* I2C4_SCL */ |
| <STM32_PINMUX('Z', 5, AF6)>; /* I2C4_SDA */ |
| bias-disable; |
| drive-open-drain; |
| slew-rate = <0>; |
| }; |
| }; |
| }; |
| |
| &i2c4 { |
| pinctrl-names = "default"; |
| pinctrl-0 = <&i2c4_pins_a>; |
| i2c-scl-rising-time-ns = <185>; |
| i2c-scl-falling-time-ns = <20>; |
| status = "okay"; |
| |
| pmic: stpmu1@33 { |
| compatible = "st,stpmu1"; |
| reg = <0x33>; |
| interrupts = <0 2>; |
| interrupt-parent = <&gpioa>; |
| interrupt-controller; |
| #interrupt-cells = <2>; |
| status = "okay"; |
| }; |
| }; |
| |
| &sdmmc1 { |
| pinctrl-names = "default"; |
| pinctrl-0 = <&sdmmc1_b4_pins_a &sdmmc1_dir_pins_a>; |
| broken-cd; |
| st,dirpol; |
| st,negedge; |
| st,pin-ckin; |
| bus-width = <4>; |
| sd-uhs-sdr12; |
| sd-uhs-sdr25; |
| sd-uhs-sdr50; |
| sd-uhs-ddr50; |
| sd-uhs-sdr104; |
| status = "okay"; |
| }; |
| |
| &uart4 { |
| pinctrl-names = "default"; |
| pinctrl-0 = <&uart4_pins_a>; |
| status = "okay"; |
| }; |