dts/upstream/Bindings/pci/amlogic,axg-pcie.yaml

# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/pci/amlogic,axg-pcie.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: Amlogic Meson AXG DWC PCIe SoC controller

maintainers:
  - Neil Armstrong <neil.armstrong@linaro.org>

description:
  Amlogic Meson PCIe host controller is based on the Synopsys DesignWare PCI core.

allOf:
  - $ref: /schemas/pci/pci-bus.yaml#
  - $ref: /schemas/pci/snps,dw-pcie-common.yaml#

# We need a select here so we don't match all nodes with 'snps,dw-pcie'
select:
  properties:
    compatible:
      enum:
        - amlogic,axg-pcie
        - amlogic,g12a-pcie
  required:
    - compatible

properties:
  compatible:
    items:
      - enum:
          - amlogic,axg-pcie
          - amlogic,g12a-pcie
      - const: snps,dw-pcie

  reg:
    items:
      - description: External local bus interface registers
      - description: Meson designed configuration registers
      - description: PCIe configuration space

  reg-names:
    items:
      - const: elbi
      - const: cfg
      - const: config

  interrupts:
    maxItems: 1

  clocks:
    items:
      - description: PCIe GEN 100M PLL clock
      - description: PCIe RC clock gate
      - description: PCIe PHY clock

  clock-names:
    items:
      - const: pclk
      - const: port
      - const: general

  phys:
    maxItems: 1

  phy-names:
    const: pcie

  resets:
    items:
      - description: Port Reset
      - description: Shared APB reset

  reset-names:
    items:
      - const: port
      - const: apb

  num-lanes:
    const: 1

  power-domains:
    maxItems: 1

required:
  - compatible
  - reg
  - reg-names
  - interrupts
  - clock
  - clock-names
  - "#address-cells"
  - "#size-cells"
  - "#interrupt-cells"
  - interrupt-map
  - interrupt-map-mask
  - ranges
  - bus-range
  - device_type
  - num-lanes
  - phys
  - phy-names
  - resets
  - reset-names

unevaluatedProperties: false

examples:
  - |
    #include <dt-bindings/interrupt-controller/irq.h>
    #include <dt-bindings/interrupt-controller/arm-gic.h>
    pcie: pcie@f9800000 {
        compatible = "amlogic,axg-pcie", "snps,dw-pcie";
        reg = <0xf9800000 0x400000>, <0xff646000 0x2000>, <0xf9f00000 0x100000>;
        reg-names = "elbi", "cfg", "config";
        interrupts = <GIC_SPI 177 IRQ_TYPE_EDGE_RISING>;
        clocks = <&pclk>, <&clk_port>, <&clk_phy>;
        clock-names = "pclk", "port", "general";
        resets = <&reset_pcie_port>, <&reset_pcie_apb>;
        reset-names = "port", "apb";
        phys = <&pcie_phy>;
        phy-names = "pcie";
        #interrupt-cells = <1>;
        interrupt-map-mask = <0 0 0 0>;
        interrupt-map = <0 0 0 0 &gic GIC_SPI 179 IRQ_TYPE_EDGE_RISING>;
        bus-range = <0x0 0xff>;
        #address-cells = <3>;
        #size-cells = <2>;
        device_type = "pci";
        num-lanes = <1>;
        ranges = <0x82000000 0 0 0xf9c00000 0 0x00300000>;
    };
...