| # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) |
| %YAML 1.2 |
| --- |
| $id: http://devicetree.org/schemas/phy/cdns,dphy.yaml# |
| $schema: http://devicetree.org/meta-schemas/core.yaml# |
| |
| title: Cadence DPHY |
| |
| maintainers: |
| - Pratyush Yadav <pratyush@kernel.org> |
| |
| properties: |
| compatible: |
| enum: |
| - cdns,dphy |
| - ti,j721e-dphy |
| |
| reg: |
| maxItems: 1 |
| |
| clocks: |
| items: |
| - description: PMA state machine clock |
| - description: PLL reference clock |
| |
| clock-names: |
| items: |
| - const: psm |
| - const: pll_ref |
| |
| "#phy-cells": |
| const: 0 |
| |
| power-domains: |
| maxItems: 1 |
| |
| required: |
| - compatible |
| - reg |
| - clocks |
| - clock-names |
| - "#phy-cells" |
| |
| additionalProperties: false |
| |
| examples: |
| - | |
| #include <dt-bindings/soc/ti,sci_pm_domain.h> |
| |
| dphy0: phy@fd0e0000{ |
| compatible = "cdns,dphy"; |
| reg = <0xfd0e0000 0x1000>; |
| clocks = <&psm_clk>, <&pll_ref_clk>; |
| clock-names = "psm", "pll_ref"; |
| power-domains = <&k3_pds 147 TI_SCI_PD_EXCLUSIVE>; |
| #phy-cells = <0>; |
| }; |