| // SPDX-License-Identifier: GPL-2.0+ |
| |
| /dts-v1/; |
| |
| #include "ast2600-u-boot.dtsi" |
| |
| / { |
| memory { |
| device_type = "memory"; |
| reg = <0x80000000 0x40000000>; |
| }; |
| |
| chosen { |
| stdout-path = &uart5; |
| }; |
| |
| aliases { |
| mmc0 = &emmc_slot0; |
| mmc1 = &sdhci_slot0; |
| mmc2 = &sdhci_slot1; |
| spi0 = &fmc; |
| spi1 = &spi1; |
| spi2 = &spi2; |
| ethernet0 = &mac0; |
| ethernet1 = &mac1; |
| ethernet2 = &mac2; |
| ethernet3 = &mac3; |
| }; |
| |
| cpus { |
| cpu@0 { |
| clock-frequency = <800000000>; |
| }; |
| cpu@1 { |
| clock-frequency = <800000000>; |
| }; |
| }; |
| }; |
| |
| &pwm { |
| status = "okay"; |
| pinctrl-names = "default"; |
| pinctrl-0 = <&pinctrl_pwm0_default |
| &pinctrl_pwm1_default |
| &pinctrl_pwm2_default |
| &pinctrl_pwm3_default |
| &pinctrl_pwm4_default |
| &pinctrl_pwm5_default |
| &pinctrl_pwm6_default |
| &pinctrl_pwm7_default |
| &pinctrl_pwm8g1_default |
| &pinctrl_pwm9g1_default |
| &pinctrl_pwm10g1_default |
| &pinctrl_pwm11g1_default |
| &pinctrl_pwm12g1_default |
| &pinctrl_pwm13g1_default |
| &pinctrl_pwm14g1_default>; |
| }; |
| |
| &uart5 { |
| u-boot,dm-pre-reloc; |
| status = "okay"; |
| }; |
| |
| &sdrammc { |
| clock-frequency = <400000000>; |
| }; |
| |
| &wdt1 { |
| status = "okay"; |
| }; |
| |
| &fmc { |
| status = "okay"; |
| |
| pinctrl-names = "default"; |
| pinctrl-0 = <&pinctrl_fmcquad_default>; |
| |
| flash@0 { |
| compatible = "spi-flash", "sst,w25q256"; |
| status = "okay"; |
| spi-max-frequency = <50000000>; |
| spi-tx-bus-width = <4>; |
| spi-rx-bus-width = <4>; |
| }; |
| |
| flash@1 { |
| compatible = "spi-flash", "sst,w25q256"; |
| status = "okay"; |
| spi-max-frequency = <50000000>; |
| spi-tx-bus-width = <4>; |
| spi-rx-bus-width = <4>; |
| }; |
| |
| flash@2 { |
| compatible = "spi-flash", "sst,w25q256"; |
| status = "okay"; |
| spi-max-frequency = <50000000>; |
| spi-tx-bus-width = <4>; |
| spi-rx-bus-width = <4>; |
| }; |
| }; |
| |
| &spi1 { |
| status = "okay"; |
| |
| pinctrl-names = "default"; |
| pinctrl-0 = <&pinctrl_spi1_default &pinctrl_spi1abr_default |
| &pinctrl_spi1cs1_default &pinctrl_spi1wp_default |
| &pinctrl_spi1wp_default &pinctrl_spi1quad_default>; |
| |
| flash@0 { |
| compatible = "spi-flash", "sst,w25q256"; |
| status = "okay"; |
| spi-max-frequency = <50000000>; |
| spi-tx-bus-width = <4>; |
| spi-rx-bus-width = <4>; |
| }; |
| }; |
| |
| &spi2 { |
| status = "okay"; |
| |
| pinctrl-names = "default"; |
| pinctrl-0 = <&pinctrl_spi2_default &pinctrl_spi2cs1_default |
| &pinctrl_spi2cs2_default &pinctrl_spi2quad_default>; |
| |
| flash@0 { |
| compatible = "spi-flash", "sst,w25q256"; |
| status = "okay"; |
| spi-max-frequency = <50000000>; |
| spi-tx-bus-width = <4>; |
| spi-rx-bus-width = <4>; |
| }; |
| }; |
| |
| &emmc { |
| u-boot,dm-pre-reloc; |
| timing-phase = <0x700ff>; |
| }; |
| |
| &emmc_slot0 { |
| u-boot,dm-pre-reloc; |
| status = "okay"; |
| bus-width = <4>; |
| pinctrl-names = "default"; |
| pinctrl-0 = <&pinctrl_emmc_default>; |
| sdhci-drive-type = <1>; |
| }; |
| |
| &i2c4 { |
| status = "okay"; |
| |
| pinctrl-names = "default"; |
| pinctrl-0 = <&pinctrl_i2c5_default>; |
| }; |
| |
| &i2c5 { |
| status = "okay"; |
| |
| pinctrl-names = "default"; |
| pinctrl-0 = <&pinctrl_i2c6_default>; |
| }; |
| |
| &i2c6 { |
| status = "okay"; |
| |
| pinctrl-names = "default"; |
| pinctrl-0 = <&pinctrl_i2c7_default>; |
| }; |
| |
| &i2c7 { |
| status = "okay"; |
| |
| pinctrl-names = "default"; |
| pinctrl-0 = <&pinctrl_i2c8_default>; |
| }; |
| |
| &i2c8 { |
| status = "okay"; |
| |
| pinctrl-names = "default"; |
| pinctrl-0 = <&pinctrl_i2c9_default>; |
| }; |
| |
| &mdio0 { |
| status = "okay"; |
| #address-cells = <1>; |
| #size-cells = <0>; |
| ethphy0: ethernet-phy@0 { |
| reg = <0>; |
| }; |
| }; |
| |
| &mdio1 { |
| status = "okay"; |
| #address-cells = <1>; |
| #size-cells = <0>; |
| ethphy1: ethernet-phy@0 { |
| reg = <0>; |
| }; |
| }; |
| |
| &mdio2 { |
| status = "okay"; |
| #address-cells = <1>; |
| #size-cells = <0>; |
| ethphy2: ethernet-phy@0 { |
| reg = <0>; |
| }; |
| }; |
| |
| &mdio3 { |
| status = "okay"; |
| #address-cells = <1>; |
| #size-cells = <0>; |
| ethphy3: ethernet-phy@0 { |
| reg = <0>; |
| }; |
| }; |
| |
| &mac0 { |
| status = "okay"; |
| phy-mode = "rgmii-rxid"; |
| phy-handle = <ðphy0>; |
| pinctrl-names = "default"; |
| pinctrl-0 = <&pinctrl_rgmii1_default>; |
| }; |
| |
| &mac1 { |
| status = "okay"; |
| phy-mode = "rgmii-rxid"; |
| phy-handle = <ðphy1>; |
| pinctrl-names = "default"; |
| pinctrl-0 = <&pinctrl_rgmii2_default>; |
| }; |
| |
| &mac2 { |
| status = "okay"; |
| phy-mode = "rgmii"; |
| phy-handle = <ðphy2>; |
| pinctrl-names = "default"; |
| pinctrl-0 = <&pinctrl_rgmii3_default>; |
| }; |
| |
| &mac3 { |
| status = "okay"; |
| phy-mode = "rgmii"; |
| phy-handle = <ðphy3>; |
| pinctrl-names = "default"; |
| pinctrl-0 = <&pinctrl_rgmii4_default>; |
| }; |
| |
| &scu { |
| mac0-clk-delay = <0x1d 0x1c |
| 0x10 0x17 |
| 0x10 0x17>; |
| mac1-clk-delay = <0x1d 0x10 |
| 0x10 0x10 |
| 0x10 0x10>; |
| mac2-clk-delay = <0x0a 0x04 |
| 0x08 0x04 |
| 0x08 0x04>; |
| mac3-clk-delay = <0x0a 0x04 |
| 0x08 0x04 |
| 0x08 0x04>; |
| }; |
| |
| &hace { |
| u-boot,dm-pre-reloc; |
| status = "okay"; |
| }; |
| |
| &acry { |
| u-boot,dm-pre-reloc; |
| status = "okay"; |
| }; |