blob: 55280f203f8db445d0312f79d6ad9487ba3ecd12 [file] [log] [blame]
Vikas Manochae66c49f2016-02-11 15:47:20 -08001/*
2 * (C) Copyright 2016
3 * Vikas Manocha, <vikas.manocha@st.com>
4 *
5 * SPDX-License-Identifier: GPL-2.0+
6 */
7
8#ifndef __CONFIG_H
9#define __CONFIG_H
10
Vikas Manochae66c49f2016-02-11 15:47:20 -080011#define CONFIG_SYS_FLASH_BASE 0x08000000
12#define CONFIG_SYS_INIT_SP_ADDR 0x20050000
13#define CONFIG_SYS_TEXT_BASE 0x08000000
14
15#define CONFIG_SYS_ICACHE_OFF
16#define CONFIG_SYS_DCACHE_OFF
17
18/*
19 * Configuration of the external SDRAM memory
20 */
21#define CONFIG_NR_DRAM_BANKS 1
Toshifumi NISHINAGA25c1b132016-07-08 01:02:25 +090022#define CONFIG_SYS_RAM_SIZE (8 * 1024 * 1024)
Vikas Manochae66c49f2016-02-11 15:47:20 -080023#define CONFIG_SYS_RAM_CS 1
24#define CONFIG_SYS_RAM_FREQ_DIV 2
Toshifumi NISHINAGA25c1b132016-07-08 01:02:25 +090025#define CONFIG_SYS_RAM_BASE 0xC0000000
Vikas Manochae66c49f2016-02-11 15:47:20 -080026#define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_RAM_BASE
Toshifumi NISHINAGA25c1b132016-07-08 01:02:25 +090027#define CONFIG_SYS_LOAD_ADDR 0xC0400000
28#define CONFIG_LOADADDR 0xC0400000
Vikas Manochae66c49f2016-02-11 15:47:20 -080029
Vikas Manochaadcc90b2016-03-09 15:18:14 -080030#define CONFIG_SYS_MAX_FLASH_SECT 8
31#define CONFIG_SYS_MAX_FLASH_BANKS 1
Vikas Manochae66c49f2016-02-11 15:47:20 -080032
Vikas Manochae66c49f2016-02-11 15:47:20 -080033#define CONFIG_ENV_IS_NOWHERE
Vikas Manochae66c49f2016-02-11 15:47:20 -080034#define CONFIG_ENV_SIZE (8 << 10)
35
36#define CONFIG_STM32_GPIO
Vikas Manochaadcc90b2016-03-09 15:18:14 -080037#define CONFIG_STM32_FLASH
Vikas Manochae66c49f2016-02-11 15:47:20 -080038#define CONFIG_STM32X7_SERIAL
39
Michael Kurzb20b70f2017-01-22 16:04:27 +010040#define CONFIG_DESIGNWARE_ETH
41#define CONFIG_DW_GMAC_DEFAULT_DMA_PBL (8)
42#define CONFIG_DW_ALTDESCRIPTOR
43#define CONFIG_MII
Michael Kurzfc0d3db2017-01-22 16:04:29 +010044#define CONFIG_PHY_SMSC
Michael Kurzb20b70f2017-01-22 16:04:27 +010045
Toshifumi NISHINAGAba0a3c12016-07-08 01:02:24 +090046#define CONFIG_STM32_HSE_HZ 25000000
47#define CONFIG_SYS_CLK_FREQ 200000000 /* 200 MHz */
Vikas Manochae66c49f2016-02-11 15:47:20 -080048#define CONFIG_SYS_HZ_CLOCK 1000000 /* Timer is clocked at 1MHz */
49
50#define CONFIG_CMDLINE_TAG
51#define CONFIG_SETUP_MEMORY_TAGS
52#define CONFIG_INITRD_TAG
53#define CONFIG_REVISION_TAG
54
55#define CONFIG_SYS_CBSIZE 1024
56#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE \
57 + sizeof(CONFIG_SYS_PROMPT) + 16)
58
59#define CONFIG_SYS_MAXARGS 16
Michael Kurzb20b70f2017-01-22 16:04:27 +010060#define CONFIG_SYS_MALLOC_LEN (1 * 1024 * 1024)
61#define CONFIG_STACKSIZE (256 * 1024)
Vikas Manochae66c49f2016-02-11 15:47:20 -080062
Vikas Manochae66c49f2016-02-11 15:47:20 -080063#define CONFIG_BOOTARGS \
64 "console=ttyS0,115200 earlyprintk consoleblank=0 ignore_loglevel"
65#define CONFIG_BOOTCOMMAND \
66 "run bootcmd_romfs"
67
68#define CONFIG_EXTRA_ENV_SETTINGS \
69 "bootargs_romfs=uclinux.physaddr=0x08180000 root=/dev/mtdblock0\0" \
70 "bootcmd_romfs=setenv bootargs ${bootargs} ${bootargs_romfs};" \
71 "bootm 0x08044000 - 0x08042000\0"
72
Vikas Manochae66c49f2016-02-11 15:47:20 -080073
74/*
75 * Command line configuration.
76 */
77#define CONFIG_SYS_LONGHELP
Vikas Manochae66c49f2016-02-11 15:47:20 -080078#define CONFIG_AUTO_COMPLETE
79#define CONFIG_CMDLINE_EDITING
80
81#define CONFIG_CMD_MEM
Vikas Manochae66c49f2016-02-11 15:47:20 -080082#endif /* __CONFIG_H */