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Tom Rini83d290c2018-05-06 17:58:06 -04001/* SPDX-License-Identifier: GPL-2.0+ */
Andy Fleming5f184712011-04-08 02:10:27 -05002/*
3 * Copyright 2011 Freescale Semiconductor, Inc.
Andy Flemingb21f87a32014-07-25 17:39:08 -05004 * Andy Fleming <afleming@gmail.com>
Andy Fleming5f184712011-04-08 02:10:27 -05005 *
Andy Fleming5f184712011-04-08 02:10:27 -05006 * This file pretty much stolen from Linux's mii.h/ethtool.h/phy.h
7 */
8
9#ifndef _PHY_H
10#define _PHY_H
11
Simon Glass2a64ada2020-07-19 10:15:39 -060012#include <log.h>
13#include <phy_interface.h>
14#include <dm/ofnode.h>
15#include <dm/read.h>
Simon Glassf2176512020-02-03 07:36:17 -070016#include <linux/errno.h>
Andy Fleming5f184712011-04-08 02:10:27 -050017#include <linux/list.h>
18#include <linux/mii.h>
19#include <linux/ethtool.h>
20#include <linux/mdio.h>
Simon Glass2a64ada2020-07-19 10:15:39 -060021
22struct udevice;
Andy Fleming5f184712011-04-08 02:10:27 -050023
Hannes Schmelzerdb40c1a2017-03-23 15:11:43 +010024#define PHY_FIXED_ID 0xa5a55a5a
Samuel Mendoza-Jonasf641a8a2019-06-18 11:37:17 +100025#define PHY_NCSI_ID 0xbeefcafe
26
Siva Durga Prasad Paladuguf41e5882018-11-27 11:49:11 +053027/*
28 * There is no actual id for this.
29 * This is just a dummy id for gmii2rgmmi converter.
30 */
31#define PHY_GMII2RGMII_ID 0x5a5a5a5a
Hannes Schmelzerdb40c1a2017-03-23 15:11:43 +010032
Andy Fleming5f184712011-04-08 02:10:27 -050033#define PHY_MAX_ADDR 32
34
Shaohui Xieddcd1f32016-01-28 15:55:46 +080035#define PHY_FLAG_BROKEN_RESET (1 << 0) /* soft reset not supported */
36
Florian Fainelli4dae6102016-01-13 16:59:33 +030037#define PHY_DEFAULT_FEATURES (SUPPORTED_Autoneg | \
Andy Fleming5f184712011-04-08 02:10:27 -050038 SUPPORTED_TP | \
39 SUPPORTED_MII)
40
Florian Fainelli4dae6102016-01-13 16:59:33 +030041#define PHY_10BT_FEATURES (SUPPORTED_10baseT_Half | \
42 SUPPORTED_10baseT_Full)
43
44#define PHY_100BT_FEATURES (SUPPORTED_100baseT_Half | \
45 SUPPORTED_100baseT_Full)
46
47#define PHY_1000BT_FEATURES (SUPPORTED_1000baseT_Half | \
Andy Fleming5f184712011-04-08 02:10:27 -050048 SUPPORTED_1000baseT_Full)
49
Florian Fainelli4dae6102016-01-13 16:59:33 +030050#define PHY_BASIC_FEATURES (PHY_10BT_FEATURES | \
51 PHY_100BT_FEATURES | \
52 PHY_DEFAULT_FEATURES)
53
54#define PHY_GBIT_FEATURES (PHY_BASIC_FEATURES | \
55 PHY_1000BT_FEATURES)
56
Andy Fleming5f184712011-04-08 02:10:27 -050057#define PHY_10G_FEATURES (PHY_GBIT_FEATURES | \
58 SUPPORTED_10000baseT_Full)
59
Stefan Roese4fb3f0c2014-10-22 12:13:15 +020060#ifndef PHY_ANEG_TIMEOUT
Andy Fleming5f184712011-04-08 02:10:27 -050061#define PHY_ANEG_TIMEOUT 4000
Stefan Roese4fb3f0c2014-10-22 12:13:15 +020062#endif
Andy Fleming5f184712011-04-08 02:10:27 -050063
64
Andy Fleming5f184712011-04-08 02:10:27 -050065struct phy_device;
66
67#define MDIO_NAME_LEN 32
68
69struct mii_dev {
70 struct list_head link;
71 char name[MDIO_NAME_LEN];
72 void *priv;
73 int (*read)(struct mii_dev *bus, int addr, int devad, int reg);
74 int (*write)(struct mii_dev *bus, int addr, int devad, int reg,
75 u16 val);
76 int (*reset)(struct mii_dev *bus);
77 struct phy_device *phymap[PHY_MAX_ADDR];
78 u32 phy_mask;
79};
80
81/* struct phy_driver: a structure which defines PHY behavior
82 *
83 * uid will contain a number which represents the PHY. During
84 * startup, the driver will poll the PHY to find out what its
85 * UID--as defined by registers 2 and 3--is. The 32-bit result
86 * gotten from the PHY will be masked to
87 * discard any bits which may change based on revision numbers
88 * unimportant to functionality
89 *
90 */
91struct phy_driver {
92 char *name;
93 unsigned int uid;
94 unsigned int mask;
95 unsigned int mmds;
96
97 u32 features;
98
99 /* Called to do any driver startup necessities */
100 /* Will be called during phy_connect */
101 int (*probe)(struct phy_device *phydev);
102
103 /* Called to configure the PHY, and modify the controller
104 * based on the results. Should be called after phy_connect */
105 int (*config)(struct phy_device *phydev);
106
107 /* Called when starting up the controller */
108 int (*startup)(struct phy_device *phydev);
109
110 /* Called when bringing down the controller */
111 int (*shutdown)(struct phy_device *phydev);
112
Stefano Babicb71841b2013-09-02 15:42:30 +0200113 int (*readext)(struct phy_device *phydev, int addr, int devad, int reg);
114 int (*writeext)(struct phy_device *phydev, int addr, int devad, int reg,
115 u16 val);
Carlo Caione4f6746d2019-02-08 17:25:06 +0000116
117 /* Phy specific driver override for reading a MMD register */
118 int (*read_mmd)(struct phy_device *phydev, int devad, int reg);
119
120 /* Phy specific driver override for writing a MMD register */
121 int (*write_mmd)(struct phy_device *phydev, int devad, int reg,
122 u16 val);
123
Andy Fleming5f184712011-04-08 02:10:27 -0500124 struct list_head list;
Alex Margineand718b692019-11-14 18:28:29 +0200125
126 /* driver private data */
127 ulong data;
Andy Fleming5f184712011-04-08 02:10:27 -0500128};
129
130struct phy_device {
131 /* Information about the PHY type */
132 /* And management functions */
133 struct mii_dev *bus;
134 struct phy_driver *drv;
135 void *priv;
136
Simon Glassc74c8e62015-04-05 16:07:39 -0600137#ifdef CONFIG_DM_ETH
138 struct udevice *dev;
Grygorii Strashkoeef0b8a2018-07-05 12:02:48 -0500139 ofnode node;
Simon Glassc74c8e62015-04-05 16:07:39 -0600140#else
Andy Fleming5f184712011-04-08 02:10:27 -0500141 struct eth_device *dev;
Simon Glassc74c8e62015-04-05 16:07:39 -0600142#endif
Andy Fleming5f184712011-04-08 02:10:27 -0500143
144 /* forced speed & duplex (no autoneg)
145 * partner speed & duplex & pause (autoneg)
146 */
147 int speed;
148 int duplex;
149
150 /* The most recently read link state */
151 int link;
152 int port;
153 phy_interface_t interface;
154
155 u32 advertising;
156 u32 supported;
157 u32 mmds;
158
159 int autoneg;
160 int addr;
161 int pause;
162 int asym_pause;
163 u32 phy_id;
Pankaj Bansalb3eabd82018-11-16 06:26:18 +0000164 bool is_c45;
Andy Fleming5f184712011-04-08 02:10:27 -0500165 u32 flags;
166};
167
Shaohui Xief55a7762013-11-14 19:00:31 +0800168struct fixed_link {
169 int phy_id;
170 int duplex;
171 int link_speed;
172 int pause;
173 int asym_pause;
174};
175
Dan Murphy6325c8b2020-05-04 16:14:36 -0500176/**
177 * phy_read - Convenience function for reading a given PHY register
178 * @phydev: the phy_device struct
179 * @devad: The MMD to read from
180 * @regnum: register number to read
181 * @return: value for success or negative errno for failure
182 */
Andy Fleming5f184712011-04-08 02:10:27 -0500183static inline int phy_read(struct phy_device *phydev, int devad, int regnum)
184{
185 struct mii_dev *bus = phydev->bus;
186
Samuel Mendoza-Jonase2ffeaa2019-06-18 11:37:18 +1000187 if (!bus || !bus->read) {
188 debug("%s: No bus configured\n", __func__);
189 return -1;
190 }
191
Andy Fleming5f184712011-04-08 02:10:27 -0500192 return bus->read(bus, phydev->addr, devad, regnum);
193}
194
Dan Murphy6325c8b2020-05-04 16:14:36 -0500195/**
196 * phy_write - Convenience function for writing a given PHY register
197 * @phydev: the phy_device struct
198 * @devad: The MMD to read from
199 * @regnum: register number to write
200 * @val: value to write to @regnum
201 * @return: 0 for success or negative errno for failure
202 */
Andy Fleming5f184712011-04-08 02:10:27 -0500203static inline int phy_write(struct phy_device *phydev, int devad, int regnum,
204 u16 val)
205{
206 struct mii_dev *bus = phydev->bus;
207
Thirupathaiah Annapureddy7def4e62020-08-17 17:31:08 -0700208 if (!bus || !bus->write) {
Samuel Mendoza-Jonase2ffeaa2019-06-18 11:37:18 +1000209 debug("%s: No bus configured\n", __func__);
210 return -1;
211 }
212
Andy Fleming5f184712011-04-08 02:10:27 -0500213 return bus->write(bus, phydev->addr, devad, regnum, val);
214}
215
Dan Murphy6325c8b2020-05-04 16:14:36 -0500216/**
217 * phy_mmd_start_indirect - Convenience function for writing MMD registers
218 * @phydev: the phy_device struct
219 * @devad: The MMD to read from
220 * @regnum: register number to write
221 * @return: None
222 */
Carlo Caione4f6746d2019-02-08 17:25:06 +0000223static inline void phy_mmd_start_indirect(struct phy_device *phydev, int devad,
224 int regnum)
225{
226 /* Write the desired MMD Devad */
227 phy_write(phydev, MDIO_DEVAD_NONE, MII_MMD_CTRL, devad);
228
229 /* Write the desired MMD register address */
230 phy_write(phydev, MDIO_DEVAD_NONE, MII_MMD_DATA, regnum);
231
232 /* Select the Function : DATA with no post increment */
233 phy_write(phydev, MDIO_DEVAD_NONE, MII_MMD_CTRL,
234 (devad | MII_MMD_CTRL_NOINCR));
235}
236
Dan Murphy6325c8b2020-05-04 16:14:36 -0500237/**
238 * phy_read_mmd - Convenience function for reading a register
239 * from an MMD on a given PHY.
240 * @phydev: The phy_device struct
241 * @devad: The MMD to read from
242 * @regnum: The register on the MMD to read
243 * @return: Value for success or negative errno for failure
244 */
Carlo Caione4f6746d2019-02-08 17:25:06 +0000245static inline int phy_read_mmd(struct phy_device *phydev, int devad,
246 int regnum)
247{
248 struct phy_driver *drv = phydev->drv;
249
250 if (regnum > (u16)~0 || devad > 32)
251 return -EINVAL;
252
253 /* driver-specific access */
254 if (drv->read_mmd)
255 return drv->read_mmd(phydev, devad, regnum);
256
257 /* direct C45 / C22 access */
258 if ((drv->features & PHY_10G_FEATURES) == PHY_10G_FEATURES ||
259 devad == MDIO_DEVAD_NONE || !devad)
260 return phy_read(phydev, devad, regnum);
261
262 /* indirect C22 access */
263 phy_mmd_start_indirect(phydev, devad, regnum);
264
265 /* Read the content of the MMD's selected register */
266 return phy_read(phydev, MDIO_DEVAD_NONE, MII_MMD_DATA);
267}
268
Dan Murphy6325c8b2020-05-04 16:14:36 -0500269/**
270 * phy_write_mmd - Convenience function for writing a register
271 * on an MMD on a given PHY.
272 * @phydev: The phy_device struct
273 * @devad: The MMD to read from
274 * @regnum: The register on the MMD to read
275 * @val: value to write to @regnum
276 * @return: 0 for success or negative errno for failure
277 */
Carlo Caione4f6746d2019-02-08 17:25:06 +0000278static inline int phy_write_mmd(struct phy_device *phydev, int devad,
279 int regnum, u16 val)
280{
281 struct phy_driver *drv = phydev->drv;
282
283 if (regnum > (u16)~0 || devad > 32)
284 return -EINVAL;
285
286 /* driver-specific access */
287 if (drv->write_mmd)
288 return drv->write_mmd(phydev, devad, regnum, val);
289
290 /* direct C45 / C22 access */
291 if ((drv->features & PHY_10G_FEATURES) == PHY_10G_FEATURES ||
292 devad == MDIO_DEVAD_NONE || !devad)
293 return phy_write(phydev, devad, regnum, val);
294
295 /* indirect C22 access */
296 phy_mmd_start_indirect(phydev, devad, regnum);
297
298 /* Write the data into MMD's selected register */
299 return phy_write(phydev, MDIO_DEVAD_NONE, MII_MMD_DATA, val);
300}
301
Dan Murphy535247a2020-05-04 16:14:38 -0500302/**
303 * phy_set_bits_mmd - Convenience function for setting bits in a register
304 * on MMD
305 * @phydev: the phy_device struct
306 * @devad: the MMD containing register to modify
307 * @regnum: register number to modify
308 * @val: bits to set
309 * @return: 0 for success or negative errno for failure
310 */
311static inline int phy_set_bits_mmd(struct phy_device *phydev, int devad,
312 u32 regnum, u16 val)
313{
314 int value, ret;
315
316 value = phy_read_mmd(phydev, devad, regnum);
317 if (value < 0)
318 return value;
319
320 value |= val;
321
322 ret = phy_write_mmd(phydev, devad, regnum, value);
323 if (ret < 0)
324 return ret;
325
326 return 0;
327}
328
329/**
330 * phy_clear_bits_mmd - Convenience function for clearing bits in a register
331 * on MMD
332 * @phydev: the phy_device struct
333 * @devad: the MMD containing register to modify
334 * @regnum: register number to modify
335 * @val: bits to clear
336 * @return: 0 for success or negative errno for failure
337 */
338static inline int phy_clear_bits_mmd(struct phy_device *phydev, int devad,
339 u32 regnum, u16 val)
340{
341 int value, ret;
342
343 value = phy_read_mmd(phydev, devad, regnum);
344 if (value < 0)
345 return value;
346
347 value &= ~val;
348
349 ret = phy_write_mmd(phydev, devad, regnum, value);
350 if (ret < 0)
351 return ret;
352
353 return 0;
354}
355
Andy Fleming5f184712011-04-08 02:10:27 -0500356#ifdef CONFIG_PHYLIB_10G
357extern struct phy_driver gen10g_driver;
358
Alex Marginean98104892020-01-09 10:50:05 +0200359/*
360 * List all 10G interfaces here, the assumption being that PHYs on these
361 * interfaces are C45
362 */
Andy Fleming5f184712011-04-08 02:10:27 -0500363static inline int is_10g_interface(phy_interface_t interface)
364{
Alex Marginean98104892020-01-09 10:50:05 +0200365 return interface == PHY_INTERFACE_MODE_XGMII ||
366 interface == PHY_INTERFACE_MODE_USXGMII ||
367 interface == PHY_INTERFACE_MODE_XFI;
Andy Fleming5f184712011-04-08 02:10:27 -0500368}
369
370#endif
371
Alex Margineanc38ac282019-07-11 18:32:56 +0300372/**
373 * phy_init() - Initializes the PHY drivers
Alex Margineanc38ac282019-07-11 18:32:56 +0300374 * This function registers all available PHY drivers
375 *
Dan Murphyea756fb2020-05-04 16:14:37 -0500376 * @return: 0 if OK, -ve on error
Alex Margineanc38ac282019-07-11 18:32:56 +0300377 */
Andy Fleming5f184712011-04-08 02:10:27 -0500378int phy_init(void);
Alex Margineanc38ac282019-07-11 18:32:56 +0300379
380/**
381 * phy_reset() - Resets the specified PHY
Alex Margineanc38ac282019-07-11 18:32:56 +0300382 * Issues a reset of the PHY and waits for it to complete
383 *
384 * @phydev: PHY to reset
Dan Murphyea756fb2020-05-04 16:14:37 -0500385 * @return: 0 if OK, -ve on error
Alex Margineanc38ac282019-07-11 18:32:56 +0300386 */
Andy Fleming5f184712011-04-08 02:10:27 -0500387int phy_reset(struct phy_device *phydev);
Alex Margineanc38ac282019-07-11 18:32:56 +0300388
389/**
390 * phy_find_by_mask() - Searches for a PHY on the specified MDIO bus
Alex Margineanc38ac282019-07-11 18:32:56 +0300391 * The function checks the PHY addresses flagged in phy_mask and returns a
392 * phy_device pointer if it detects a PHY.
393 * This function should only be called if just one PHY is expected to be present
394 * in the set of addresses flagged in phy_mask. If multiple PHYs are present,
395 * it is undefined which of these PHYs is returned.
396 *
397 * @bus: MII/MDIO bus to scan
398 * @phy_mask: bitmap of PYH addresses to scan
399 * @interface: type of MAC-PHY interface
Dan Murphyea756fb2020-05-04 16:14:37 -0500400 * @return: pointer to phy_device if a PHY is found, or NULL otherwise
Alex Margineanc38ac282019-07-11 18:32:56 +0300401 */
Troy Kisky1adb4062012-10-22 16:40:43 +0000402struct phy_device *phy_find_by_mask(struct mii_dev *bus, unsigned phy_mask,
403 phy_interface_t interface);
Alex Margineanc38ac282019-07-11 18:32:56 +0300404
Simon Glassc74c8e62015-04-05 16:07:39 -0600405#ifdef CONFIG_DM_ETH
Alex Margineanc38ac282019-07-11 18:32:56 +0300406
407/**
408 * phy_connect_dev() - Associates the given pair of PHY and Ethernet devices
409 * @phydev: PHY device
410 * @dev: Ethernet device
411 */
Simon Glassc74c8e62015-04-05 16:07:39 -0600412void phy_connect_dev(struct phy_device *phydev, struct udevice *dev);
Alex Margineanc38ac282019-07-11 18:32:56 +0300413
414/**
415 * phy_connect() - Creates a PHY device for the Ethernet interface
Alex Margineanc38ac282019-07-11 18:32:56 +0300416 * Creates a PHY device for the PHY at the given address, if one doesn't exist
417 * already, and associates it with the Ethernet device.
418 * The function may be called with addr <= 0, in this case addr value is ignored
419 * and the bus is scanned to detect a PHY. Scanning should only be used if only
420 * one PHY is expected to be present on the MDIO bus, otherwise it is undefined
421 * which PHY is returned.
422 *
423 * @bus: MII/MDIO bus that hosts the PHY
424 * @addr: PHY address on MDIO bus
425 * @dev: Ethernet device to associate to the PHY
426 * @interface: type of MAC-PHY interface
Dan Murphyea756fb2020-05-04 16:14:37 -0500427 * @return: pointer to phy_device if a PHY is found, or NULL otherwise
Alex Margineanc38ac282019-07-11 18:32:56 +0300428 */
Simon Glassc74c8e62015-04-05 16:07:39 -0600429struct phy_device *phy_connect(struct mii_dev *bus, int addr,
430 struct udevice *dev,
431 phy_interface_t interface);
Alex Margineanc38ac282019-07-11 18:32:56 +0300432
Grygorii Strashkoeef0b8a2018-07-05 12:02:48 -0500433static inline ofnode phy_get_ofnode(struct phy_device *phydev)
434{
435 if (ofnode_valid(phydev->node))
436 return phydev->node;
437 else
438 return dev_ofnode(phydev->dev);
439}
Simon Glassc74c8e62015-04-05 16:07:39 -0600440#else
Alex Margineanc38ac282019-07-11 18:32:56 +0300441
442/**
443 * phy_connect_dev() - Associates the given pair of PHY and Ethernet devices
444 * @phydev: PHY device
445 * @dev: Ethernet device
446 */
Troy Kisky1adb4062012-10-22 16:40:43 +0000447void phy_connect_dev(struct phy_device *phydev, struct eth_device *dev);
Alex Margineanc38ac282019-07-11 18:32:56 +0300448
449/**
450 * phy_connect() - Creates a PHY device for the Ethernet interface
Alex Margineanc38ac282019-07-11 18:32:56 +0300451 * Creates a PHY device for the PHY at the given address, if one doesn't exist
452 * already, and associates it with the Ethernet device.
453 * The function may be called with addr <= 0, in this case addr value is ignored
454 * and the bus is scanned to detect a PHY. Scanning should only be used if only
455 * one PHY is expected to be present on the MDIO bus, otherwise it is undefined
456 * which PHY is returned.
457 *
458 * @bus: MII/MDIO bus that hosts the PHY
459 * @addr: PHY address on MDIO bus
460 * @dev: Ethernet device to associate to the PHY
461 * @interface: type of MAC-PHY interface
Dan Murphyea756fb2020-05-04 16:14:37 -0500462 * @return: pointer to phy_device if a PHY is found, or NULL otherwise
Alex Margineanc38ac282019-07-11 18:32:56 +0300463 */
Andy Fleming5f184712011-04-08 02:10:27 -0500464struct phy_device *phy_connect(struct mii_dev *bus, int addr,
465 struct eth_device *dev,
466 phy_interface_t interface);
Alex Margineanc38ac282019-07-11 18:32:56 +0300467
Grygorii Strashkoeef0b8a2018-07-05 12:02:48 -0500468static inline ofnode phy_get_ofnode(struct phy_device *phydev)
469{
470 return ofnode_null();
471}
Simon Glassc74c8e62015-04-05 16:07:39 -0600472#endif
Andy Fleming5f184712011-04-08 02:10:27 -0500473int phy_startup(struct phy_device *phydev);
474int phy_config(struct phy_device *phydev);
475int phy_shutdown(struct phy_device *phydev);
476int phy_register(struct phy_driver *drv);
Alexey Brodkinb18acb02016-01-13 16:59:34 +0300477int phy_set_supported(struct phy_device *phydev, u32 max_speed);
Andy Fleming5f184712011-04-08 02:10:27 -0500478int genphy_config_aneg(struct phy_device *phydev);
Troy Kisky8682aba2012-02-07 14:08:48 +0000479int genphy_restart_aneg(struct phy_device *phydev);
Andy Fleming5f184712011-04-08 02:10:27 -0500480int genphy_update_link(struct phy_device *phydev);
Yegor Yefremove2043f52012-11-28 11:15:17 +0100481int genphy_parse_link(struct phy_device *phydev);
Andy Fleming5f184712011-04-08 02:10:27 -0500482int genphy_config(struct phy_device *phydev);
483int genphy_startup(struct phy_device *phydev);
484int genphy_shutdown(struct phy_device *phydev);
485int gen10g_config(struct phy_device *phydev);
486int gen10g_startup(struct phy_device *phydev);
487int gen10g_shutdown(struct phy_device *phydev);
488int gen10g_discover_mmds(struct phy_device *phydev);
489
Florian Fainelli137963d2017-12-09 14:59:54 -0800490int phy_b53_init(void);
Kevin Smith24ae3962016-03-31 19:33:12 +0000491int phy_mv88e61xx_init(void);
Shaohui Xief7c38cf2014-12-30 18:32:04 +0800492int phy_aquantia_init(void);
Andy Fleming9082eea2011-04-07 21:56:05 -0500493int phy_atheros_init(void);
494int phy_broadcom_init(void);
Shengzhou Liu9b18e512014-11-10 18:32:29 +0800495int phy_cortina_init(void);
Abbie Changa70d7b02021-01-14 13:34:12 -0800496int phy_cortina_access_init(void);
Andy Fleming9082eea2011-04-07 21:56:05 -0500497int phy_davicom_init(void);
Matt Porterf485c8a2013-03-20 05:38:13 +0000498int phy_et1011c_init(void);
Andy Fleming9082eea2011-04-07 21:56:05 -0500499int phy_lxt_init(void);
500int phy_marvell_init(void);
Alexandru Gagniucd397f7c2017-07-07 11:36:57 -0700501int phy_micrel_ksz8xxx_init(void);
502int phy_micrel_ksz90x1_init(void);
Neil Armstrong8995a962017-10-18 10:02:10 +0200503int phy_meson_gxl_init(void);
Andy Fleming9082eea2011-04-07 21:56:05 -0500504int phy_natsemi_init(void);
505int phy_realtek_init(void);
Vladimir Zapolskiyb6abf552011-12-29 15:18:37 +0000506int phy_smsc_init(void);
Andy Fleming9082eea2011-04-07 21:56:05 -0500507int phy_teranetics_init(void);
Edgar E. Iglesias721aed72015-09-25 23:46:08 -0700508int phy_ti_init(void);
Andy Fleming9082eea2011-04-07 21:56:05 -0500509int phy_vitesse_init(void);
Siva Durga Prasad Paladugued6fad32016-02-05 13:22:10 +0530510int phy_xilinx_init(void);
John Haechtena5fd13a2016-12-09 22:15:17 +0000511int phy_mscc_init(void);
Hannes Schmelzerdb40c1a2017-03-23 15:11:43 +0100512int phy_fixed_init(void);
Samuel Mendoza-Jonase2ffeaa2019-06-18 11:37:18 +1000513int phy_ncsi_init(void);
Siva Durga Prasad Paladuguf41e5882018-11-27 11:49:11 +0530514int phy_xilinx_gmii2rgmii_init(void);
Timur Tabia8366262011-10-18 18:44:34 -0500515
Fabio Estevam2fb63962014-02-15 14:52:00 -0200516int board_phy_config(struct phy_device *phydev);
Shengzhou Liu5707d5f2015-04-07 18:46:32 +0800517int get_phy_id(struct mii_dev *bus, int addr, int devad, u32 *phy_id);
Fabio Estevam2fb63962014-02-15 14:52:00 -0200518
Simon Glassc74c8e62015-04-05 16:07:39 -0600519/**
520 * phy_get_interface_by_name() - Look up a PHY interface name
521 *
522 * @str: PHY interface name, e.g. "mii"
Dan Murphyea756fb2020-05-04 16:14:37 -0500523 * @return: PHY_INTERFACE_MODE_... value, or -1 if not found
Simon Glassc74c8e62015-04-05 16:07:39 -0600524 */
525int phy_get_interface_by_name(const char *str);
526
Dan Murphy3ab72fe2016-05-02 15:46:00 -0500527/**
528 * phy_interface_is_rgmii - Convenience function for testing if a PHY interface
529 * is RGMII (all variants)
530 * @phydev: the phy_device struct
Dan Murphyea756fb2020-05-04 16:14:37 -0500531 * @return: true if MII bus is RGMII or false if it is not
Dan Murphy3ab72fe2016-05-02 15:46:00 -0500532 */
533static inline bool phy_interface_is_rgmii(struct phy_device *phydev)
534{
535 return phydev->interface >= PHY_INTERFACE_MODE_RGMII &&
536 phydev->interface <= PHY_INTERFACE_MODE_RGMII_TXID;
537}
538
Dan Murphy3c221af2016-05-02 15:46:01 -0500539/**
540 * phy_interface_is_sgmii - Convenience function for testing if a PHY interface
541 * is SGMII (all variants)
542 * @phydev: the phy_device struct
Dan Murphyea756fb2020-05-04 16:14:37 -0500543 * @return: true if MII bus is SGMII or false if it is not
Dan Murphy3c221af2016-05-02 15:46:01 -0500544 */
545static inline bool phy_interface_is_sgmii(struct phy_device *phydev)
546{
547 return phydev->interface >= PHY_INTERFACE_MODE_SGMII &&
548 phydev->interface <= PHY_INTERFACE_MODE_QSGMII;
549}
550
Timur Tabia8366262011-10-18 18:44:34 -0500551/* PHY UIDs for various PHYs that are referenced in external code */
Priyanka Jain1ddcf5e2018-10-11 04:47:05 +0000552#define PHY_UID_CS4340 0x13e51002
553#define PHY_UID_CS4223 0x03e57003
554#define PHY_UID_TN2020 0x00a19410
555#define PHY_UID_IN112525_S03 0x02107440
Timur Tabia8366262011-10-18 18:44:34 -0500556
Andy Fleming5f184712011-04-08 02:10:27 -0500557#endif