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wdenka6c7ad22002-12-03 21:28:10 +00001/*
2 * (C) Copyright 2002
3 * Stäubli Faverges - <www.staubli.com>
4 * Pierre AUBERT p.aubert@staubli.com
5 *
6 * See file CREDITS for list of people who contributed to this
7 * project.
8 *
9 * This program is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License as
11 * published by the Free Software Foundation; either version 2 of
12 * the License, or (at your option) any later version.
13 *
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
18 *
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software
21 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
22 * MA 02111-1307 USA
23 */
24/* Video support for Epson SED13806 chipset */
25
26
27#ifndef _SED13806_H_
28#define _SED13806_H_
29
30
31/* General definitions */
32#define FRAME_BUFFER_OFFSET 0x200000 /* Frame buffer offset */
33#define TOTAL_SPACE_SIZE 0x400000
34
35#define DEFAULT_VIDEO_MEMORY_SIZE 0x140000 /* Video Memory Size */
36
37#define HWCURSORSIZE 1024 /* Size of memory reserved
wdenk8bde7f72003-06-27 21:31:46 +000038 for HW cursor*/
wdenka6c7ad22002-12-03 21:28:10 +000039
40/* Offset of chipset registers */
41#define BLT_CTRL0 (0x0100)
42#define BLT_CTRL1 (0x0101)
43#define BLT_ROP (0x0102)
44#define BLT_OP (0x0103)
45#define BLT_SRC_ADDR0 (0x0104)
46#define BLT_SRC_ADDR1 (0x0105)
47#define BLT_SRC_ADDR2 (0x0106)
48#define BLT_DST_ADDR0 (0x0108)
49#define BLT_DST_ADDR1 (0x0109)
50#define BLT_DST_ADDR2 (0x010A)
51#define BLT_MEM_OFF0 (0x010C)
52#define BLT_MEM_OFF1 (0x010D)
53#define BLT_WIDTH0 (0x0110)
54#define BLT_WIDTH1 (0x0111)
55#define BLT_HEIGHT0 (0x0112)
56#define BLT_HEIGHT1 (0x0113)
57#define BLT_BGCOLOR0 (0x0114)
58#define BLT_BGCOLOR1 (0x0115)
59#define BLT_FGCOLOR0 (0x0118)
60#define BLT_FGCOLOR1 (0x0119)
61
62#define BLT_REG (0x100000)
63
64/* Lookup table registers */
65#define REG_LUT_ADDR 0x1e2
66#define REG_LUT_DATA 0x1e4
67
68/* Cursor/Ink registers */
69#define LCD_CURSOR_CNTL (0x0070)
70#define LCD_CURSOR_START (0x0071)
71#define LCD_CURSOR_XL (0x0072)
72#define LCD_CURSOR_XM (0x0073)
73#define LCD_CURSOR_YL (0x0074)
74#define LCD_CURSOR_YM (0x0075)
75#define LCD_CURSOR_COL0_B (0x0076)
76#define LCD_CURSOR_COL0_G (0x0077)
77#define LCD_CURSOR_COL0_R (0x0078)
78#define LCD_CURSOR_COL1_B (0x007A)
79#define LCD_CURSOR_COL1_G (0x007B)
80#define LCD_CURSOR_COL1_R (0x007C)
81#define LCD_CURSOR_FIFO (0x007E)
82
83typedef struct
84{
85 unsigned short Index;
86 unsigned char Value;
87} S1D_REGS;
88
89
wdenka6c7ad22002-12-03 21:28:10 +000090/* Board specific functions */
91unsigned int board_video_init (void);
92void board_validate_screen (unsigned int base);
93const S1D_REGS *board_get_regs (void);
94int board_get_width (void);
95int board_get_height (void);
96
97#endif /* _SED13806_H_ */