blob: 9ede7645d9e1230d97cdf99caa35c8fe68b39e02 [file] [log] [blame]
Guennadi Liakhovetskib5dc9b32008-04-14 10:53:12 +02001/*
2 * Copyright (C) 2008, Guennadi Liakhovetski <lg@denx.de>
3 *
4 * Configuration settings for the MX31ADS Freescale board.
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License as
8 * published by the Free Software Foundation; either version 2 of
9 * the License, or (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
19 * MA 02111-1307 USA
20 */
21
22#ifndef __CONFIG_H
23#define __CONFIG_H
24
25#include <asm/arch/mx31-regs.h>
26
27 /* High Level Configuration Options */
28#define CONFIG_ARM1136 1 /* This is an arm1136 CPU core */
29#define CONFIG_MX31 1 /* in a mx31 */
30#define CONFIG_MX31_HCLK_FREQ 26000000 /* RedBoot says 26MHz */
Guennadi Liakhovetski2ab02fd2008-05-08 10:09:27 +020031#define CONFIG_MX31_CLK32 32768
Guennadi Liakhovetskib5dc9b32008-04-14 10:53:12 +020032
33#define CONFIG_DISPLAY_CPUINFO
34#define CONFIG_DISPLAY_BOARDINFO
35
36/*
37 * Disabled for now due to build problems under Debian and a significant increase
38 * in the final file size: 144260 vs. 109536 Bytes.
39 */
40#if 0
41#define CONFIG_OF_LIBFDT 1
42#define CONFIG_FIT 1
43#define CONFIG_FIT_VERBOSE 1
44#endif
45
46#define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */
47#define CONFIG_SETUP_MEMORY_TAGS 1
48#define CONFIG_INITRD_TAG 1
49
50/*
51 * Size of malloc() pool
52 */
53#define CFG_MALLOC_LEN (CFG_ENV_SIZE + 128 * 1024)
Guennadi Liakhovetski0a0b6062008-04-15 13:33:11 +020054#define CFG_GBL_DATA_SIZE 128 /* size in bytes reserved for initial data */
Guennadi Liakhovetskib5dc9b32008-04-14 10:53:12 +020055
56/*
57 * Hardware drivers
58 */
59
60#define CONFIG_MX31_UART 1
61#define CFG_MX31_UART1 1
62
Guennadi Liakhovetski0a0b6062008-04-15 13:33:11 +020063#define CONFIG_HARD_SPI 1
64#define CONFIG_MXC_SPI 1
Haavard Skinnemoend255bb02008-05-16 11:10:31 +020065#define CONFIG_DEFAULT_SPI_BUS 1
66#define CONFIG_DEFAULT_SPI_MODE (SPI_MODE_2 | SPI_CS_HIGH)
Guennadi Liakhovetski0a0b6062008-04-15 13:33:11 +020067
68#define CONFIG_RTC_MC13783 1
69
Guennadi Liakhovetskib5dc9b32008-04-14 10:53:12 +020070/* allow to overwrite serial and ethaddr */
71#define CONFIG_ENV_OVERWRITE
72#define CONFIG_CONS_INDEX 1
73#define CONFIG_BAUDRATE 115200
74#define CFG_BAUDRATE_TABLE {9600, 19200, 38400, 57600, 115200}
75
76/***********************************************************
77 * Command definition
78 ***********************************************************/
79
80#include <config_cmd_default.h>
81
Guennadi Liakhovetskib5dc9b32008-04-14 10:53:12 +020082#define CONFIG_CMD_PING
Guennadi Liakhovetski7602ed52008-04-28 00:25:32 +020083#define CONFIG_CMD_DHCP
Guennadi Liakhovetski0a0b6062008-04-15 13:33:11 +020084#define CONFIG_CMD_SPI
85#define CONFIG_CMD_DATE
Guennadi Liakhovetskib5dc9b32008-04-14 10:53:12 +020086
87#define CONFIG_BOOTDELAY 3
88
Guennadi Liakhovetski7602ed52008-04-28 00:25:32 +020089#define CONFIG_LOADADDR 0x80800000 /* loadaddr env var */
Guennadi Liakhovetskib5dc9b32008-04-14 10:53:12 +020090
Guennadi Liakhovetski0a0b6062008-04-15 13:33:11 +020091#define CONFIG_EXTRA_ENV_SETTINGS \
92 "netdev=eth0\0" \
93 "uboot_addr=0xa0000000\0" \
94 "uboot=mx31ads/u-boot.bin\0" \
95 "kernel=mx31ads/uImage\0" \
96 "nfsroot=/opt/eldk/arm\0" \
97 "bootargs_base=setenv bootargs console=ttymxc0,115200\0" \
98 "bootargs_nfs=setenv bootargs ${bootargs} root=/dev/nfs " \
99 "ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \
100 "bootcmd=run bootcmd_net\0" \
101 "bootcmd_net=run bootargs_base bootargs_nfs; " \
102 "tftpboot ${loadaddr} ${kernel}; bootm\0" \
103 "prg_uboot=tftpboot ${loadaddr} ${uboot}; " \
104 "protect off ${uboot_addr} 0xa003ffff; " \
105 "erase ${uboot_addr} 0xa003ffff; " \
106 "cp.b ${loadaddr} ${uboot_addr} ${filesize}; " \
107 "setenv filesize; saveenv\0"
Guennadi Liakhovetskib5dc9b32008-04-14 10:53:12 +0200108
109#define CONFIG_DRIVER_CS8900 1
110#define CS8900_BASE 0xb4020300
Guennadi Liakhovetskid23ff682008-04-03 17:04:22 +0200111#define CS8900_BUS16 1 /* follow the Linux driver */
112
113/*
114 * The MX31ADS board seems to have a hardware "peculiarity" confirmed under
115 * U-Boot, RedBoot and Linux: the ethernet Rx signal is reaching the CS8900A
116 * controller inverted. The controller is capable of detecting and correcting
117 * this, but it needs 4 network packets for that. Which means, at startup, you
118 * will not receive answers to the first 4 packest, unless there have been some
119 * broadcasts on the network, or your board is on a hub. Reducing the ARP
120 * timeout from default 5 seconds to 200ms we speed up the initial TFTP
121 * transfer, should the user wish one, significantly.
122 */
123#define CONFIG_ARP_TIMEOUT 200UL
Guennadi Liakhovetskib5dc9b32008-04-14 10:53:12 +0200124
125/*
126 * Miscellaneous configurable options
127 */
128#define CFG_LONGHELP /* undef to save memory */
129#define CFG_PROMPT "=> "
130#define CFG_CBSIZE 256 /* Console I/O Buffer Size */
131/* Print Buffer Size */
Guennadi Liakhovetskid23ff682008-04-03 17:04:22 +0200132#define CFG_PBSIZE (CFG_CBSIZE + sizeof(CFG_PROMPT) + 16)
Guennadi Liakhovetskib5dc9b32008-04-14 10:53:12 +0200133#define CFG_MAXARGS 16 /* max number of command args */
134#define CFG_BARGSIZE CFG_CBSIZE /* Boot Argument Buffer Size */
135
136#define CFG_MEMTEST_START 0 /* memtest works on */
137#define CFG_MEMTEST_END 0x10000
138
139#undef CFG_CLKS_IN_HZ /* everything, incl board info, in Hz */
140
Guennadi Liakhovetski0a0b6062008-04-15 13:33:11 +0200141#define CFG_LOAD_ADDR CONFIG_LOADADDR
Guennadi Liakhovetskib5dc9b32008-04-14 10:53:12 +0200142
Guennadi Liakhovetski2ab02fd2008-05-08 10:09:27 +0200143#define CFG_HZ CONFIG_MX31_CLK32 /* use 32kHz clock as source */
Guennadi Liakhovetskib5dc9b32008-04-14 10:53:12 +0200144
145#define CONFIG_CMDLINE_EDITING 1
146
147/*-----------------------------------------------------------------------
148 * Stack sizes
149 *
150 * The stack sizes are set up in start.S using the settings below
151 */
152#define CONFIG_STACKSIZE (128 * 1024) /* regular stack */
153
154/*-----------------------------------------------------------------------
155 * Physical Memory Map
156 */
157#define CONFIG_NR_DRAM_BANKS 1
158#define PHYS_SDRAM_1 CSD0_BASE
159#define PHYS_SDRAM_1_SIZE (128 * 1024 * 1024)
160
161/*-----------------------------------------------------------------------
162 * FLASH and environment organization
163 */
164#define CFG_FLASH_BASE CS0_BASE
165#define CFG_MAX_FLASH_BANKS 1 /* max number of memory banks */
166#define CFG_MAX_FLASH_SECT 262 /* max number of sectors on one chip */
167#define CFG_MONITOR_BASE CFG_FLASH_BASE /* Monitor at beginning of flash */
Guennadi Liakhovetskid23ff682008-04-03 17:04:22 +0200168#define CFG_MONITOR_LEN (256 * 1024) /* Reserve 256KiB */
Guennadi Liakhovetskib5dc9b32008-04-14 10:53:12 +0200169
170#define CFG_ENV_IS_IN_FLASH 1
171#define CFG_ENV_SECT_SIZE (32 * 1024)
172#define CFG_ENV_SIZE CFG_ENV_SECT_SIZE
Guennadi Liakhovetskid23ff682008-04-03 17:04:22 +0200173
174/* Address and size of Redundant Environment Sector */
175#define CFG_ENV_OFFSET_REDUND (CFG_ENV_OFFSET + CFG_ENV_SIZE)
176#define CFG_ENV_SIZE_REDUND CFG_ENV_SIZE
177
Guennadi Liakhovetskib5dc9b32008-04-14 10:53:12 +0200178/* S29WS256N NOR flash has 4 32KiB small sectors at the beginning and at the end.
179 * The rest of 32MiB is in 128KiB big sectors. U-Boot occupies the low 4 sectors,
180 * if we put environment next to it, we will have to occupy 128KiB for it.
181 * Putting it at the top of flash we use only 32KiB. */
Guennadi Liakhovetskid23ff682008-04-03 17:04:22 +0200182#define CFG_ENV_ADDR (CFG_MONITOR_BASE + CFG_ENV_SECT_SIZE)
Guennadi Liakhovetskib5dc9b32008-04-14 10:53:12 +0200183
184/*-----------------------------------------------------------------------
185 * CFI FLASH driver setup
186 */
187#define CFG_FLASH_CFI 1 /* Flash memory is CFI compliant */
Jean-Christophe PLAGNIOL-VILLARD00b18832008-08-13 01:40:42 +0200188#define CONFIG_FLASH_CFI_DRIVER 1 /* Use drivers/cfi_flash.c */
Guennadi Liakhovetskid23ff682008-04-03 17:04:22 +0200189#define CONFIG_FLASH_SPANSION_S29WS_N 1 /* A non-standard buffered write algorithm */
Guennadi Liakhovetskib5dc9b32008-04-14 10:53:12 +0200190#define CFG_FLASH_USE_BUFFER_WRITE 1 /* Use buffered writes (~10x faster) */
Guennadi Liakhovetskib5dc9b32008-04-14 10:53:12 +0200191#define CFG_FLASH_PROTECTION 1 /* Use hardware sector protection */
192
193/*
194 * JFFS2 partitions
195 */
196#undef CONFIG_JFFS2_CMDLINE
197#define CONFIG_JFFS2_DEV "nor0"
198
199#endif /* __CONFIG_H */