blob: 1393ea15af6f18140820acc697d30800f0348d46 [file] [log] [blame]
wdenk67c4f482002-08-26 22:23:10 +00001/*
2 * (C) Copyright 2001
3 * Denis Peter, MPL AG Switzerland, d.peter@mpl.ch
4 *
5 * See file CREDITS for list of people who contributed to this
6 * project.
7 *
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License as
10 * published by the Free Software Foundation; either version 2 of
11 * the License, or (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
21 * MA 02111-1307 USA
22 *
23 */
24
25/* NOT Used yet...
26 add following code to PIP405.c :
27int testdram (void)
28{
29 unsigned char s[32];
30 int i;
31
32 i = getenv_r ("testmem", s, 32);
33 if (i != 0) {
34 i = (int) simple_strtoul (s, NULL, 10);
35 if ((i > 0) && (i < 0xf)) {
36 printf ("testing ");
37 i = mem_test (0, ramsize, i);
38 if (i > 0)
39 printf ("ERROR ");
40 else
41 printf ("Ok ");
42 }
43 }
44 return (1);
45}
46*/
47
48
49#include <common.h>
50#include <asm/processor.h>
Stefan Roese79b2d0b2007-02-20 10:27:08 +010051#include <4xx_i2c.h>
wdenk67c4f482002-08-26 22:23:10 +000052
Wolfgang Denkd87080b2006-03-31 18:32:53 +020053DECLARE_GLOBAL_DATA_PTR;
54
wdenk67c4f482002-08-26 22:23:10 +000055#define FALSE 0
56#define TRUE 1
57
Wolfgang Denk53677ef2008-05-20 16:00:29 +020058#define TEST_QUIET 8
59#define TEST_SHOW_PROG 4
60#define TEST_SHOW_ERR 2
Wolfgang Denkd87080b2006-03-31 18:32:53 +020061#define TEST_SHOW_ALL 1
wdenk67c4f482002-08-26 22:23:10 +000062
63#define TESTPAT1 0xAA55AA55
64#define TESTPAT2 0x55AA55AA
65#define TEST_PASSED 0
66#define TEST_FAILED 1
67#define MEGABYTE (1024*1024)
68
69
wdenk67c4f482002-08-26 22:23:10 +000070typedef struct {
71 volatile unsigned long pat1;
72 volatile unsigned long pat2;
73} RAM_MEMTEST_PATTERN2;
74
75typedef struct {
76 volatile unsigned long addr;
77} RAM_MEMTEST_ADDRLINE;
78
79static __inline unsigned long Swap_32 (unsigned long val)
80{
81 return (((val << 16) & 0xFFFF0000) | ((val >> 16) & 0x0000FFFF));
82}
83
84void testm_puts (int quiet, char *buf)
85{
86 if ((quiet & TEST_SHOW_ALL) == TEST_SHOW_ALL)
87 puts (buf);
88}
89
90
91void Write_Error (int mode, unsigned long addr, unsigned long expected,
92 unsigned long actual)
93{
94
95 char dispbuf[64];
96
97 sprintf (dispbuf, "\n ERROR @ 0x%08lX: (exp: 0x%08lX act: 0x%08lX) ",
98 addr, expected, actual);
99 testm_puts (((mode & TEST_SHOW_ERR) ==
100 TEST_SHOW_ERR) ? TEST_SHOW_ALL : mode, dispbuf);
101}
102
103
104/*
105 * fills the memblock of <size> bytes from <startaddr> with pat1 and pat2
106 */
107
108
109void RAM_MemTest_WritePattern2 (unsigned long startaddr,
110 unsigned long size, unsigned long pat1,
111 unsigned long pat2)
112{
113 RAM_MEMTEST_PATTERN2 *p, *pe;
114
115 p = (RAM_MEMTEST_PATTERN2 *) startaddr;
116 pe = (RAM_MEMTEST_PATTERN2 *) (startaddr + size);
117
118 while (p < pe) {
119 p->pat1 = pat1;
120 p->pat2 = pat2;
121 p++;
122 } /* endwhile */
123}
124
125/*
126 * checks the memblock of <size> bytes from <startaddr> with pat1 and pat2
127 * returns the address of the first error or NULL if all is well
128 */
129
130void *RAM_MemTest_CheckPattern2 (int mode, unsigned long startaddr,
131 unsigned long size, unsigned long pat1,
132 unsigned long pat2)
133{
134 RAM_MEMTEST_PATTERN2 *p, *pe;
135 unsigned long actual1, actual2;
136
137 p = (RAM_MEMTEST_PATTERN2 *) startaddr;
138 pe = (RAM_MEMTEST_PATTERN2 *) (startaddr + size);
139
140 while (p < pe) {
141 actual1 = p->pat1;
142 actual2 = p->pat2;
143
144 if (actual1 != pat1) {
145 Write_Error (mode, (unsigned long) &(p->pat1), pat1, actual1);
146 return ((void *) &(p->pat1));
147 }
148 /* endif */
149 if (actual2 != pat2) {
150 Write_Error (mode, (unsigned long) &(p->pat2), pat2, actual2);
151 return ((void *) &(p->pat2));
152 }
153 /* endif */
154 p++;
155 } /* endwhile */
156
157 return (NULL);
158}
159
160/*
161 * fills the memblock of <size> bytes from <startaddr> with the address
162 */
163
164void RAM_MemTest_WriteAddrLine (unsigned long startaddr,
165 unsigned long size, int swapped)
166{
167 RAM_MEMTEST_ADDRLINE *p, *pe;
168
169 p = (RAM_MEMTEST_ADDRLINE *) startaddr;
170 pe = (RAM_MEMTEST_ADDRLINE *) (startaddr + size);
171
172 if (!swapped) {
173 while (p < pe) {
174 p->addr = (unsigned long) p;
175 p++;
176 } /* endwhile */
177 } else {
178 while (p < pe) {
179 p->addr = Swap_32 ((unsigned long) p);
180 p++;
181 } /* endwhile */
182 } /* endif */
183}
184
185/*
186 * checks the memblock of <size> bytes from <startaddr>
187 * returns the address of the error or NULL if all is well
188 */
189
190void *RAM_MemTest_CheckAddrLine (int mode, unsigned long startaddr,
191 unsigned long size, int swapped)
192{
193 RAM_MEMTEST_ADDRLINE *p, *pe;
194 unsigned long actual, expected;
195
196 p = (RAM_MEMTEST_ADDRLINE *) startaddr;
197 pe = (RAM_MEMTEST_ADDRLINE *) (startaddr + size);
198
199 if (!swapped) {
200 while (p < pe) {
201 actual = p->addr;
202 expected = (unsigned long) p;
203 if (actual != expected) {
204 Write_Error (mode, (unsigned long) &(p->addr), expected,
205 actual);
206 return ((void *) &(p->addr));
207 } /* endif */
208 p++;
209 } /* endwhile */
210 } else {
211 while (p < pe) {
212 actual = p->addr;
213 expected = Swap_32 ((unsigned long) p);
214 if (actual != expected) {
215 Write_Error (mode, (unsigned long) &(p->addr), expected,
216 actual);
217 return ((void *) &(p->addr));
218 } /* endif */
219 p++;
220 } /* endwhile */
221 } /* endif */
222
223 return (NULL);
224}
225
226/*
227 * checks the memblock of <size> bytes from <startaddr+size>
228 * returns the address of the error or NULL if all is well
229 */
230
231void *RAM_MemTest_CheckAddrLineReverse (int mode, unsigned long startaddr,
232 unsigned long size, int swapped)
233{
234 RAM_MEMTEST_ADDRLINE *p, *pe;
235 unsigned long actual, expected;
236
237 p = (RAM_MEMTEST_ADDRLINE *) (startaddr + size - sizeof (p->addr));
238 pe = (RAM_MEMTEST_ADDRLINE *) startaddr;
239
240 if (!swapped) {
241 while (p > pe) {
242 actual = p->addr;
243 expected = (unsigned long) p;
244 if (actual != expected) {
245 Write_Error (mode, (unsigned long) &(p->addr), expected,
246 actual);
247 return ((void *) &(p->addr));
248 } /* endif */
249 p--;
250 } /* endwhile */
251 } else {
252 while (p > pe) {
253 actual = p->addr;
254 expected = Swap_32 ((unsigned long) p);
255 if (actual != expected) {
256 Write_Error (mode, (unsigned long) &(p->addr), expected,
257 actual);
258 return ((void *) &(p->addr));
259 } /* endif */
260 p--;
261 } /* endwhile */
262 } /* endif */
263
264 return (NULL);
265}
266
267/*
268 * fills the memblock of <size> bytes from <startaddr> with walking bit pattern
269 */
270
271void RAM_MemTest_WriteWalkBit (unsigned long startaddr, unsigned long size)
272{
273 volatile unsigned long *p, *pe;
274 unsigned long i;
275
276 p = (unsigned long *) startaddr;
277 pe = (unsigned long *) (startaddr + size);
278 i = 0;
279
280 while (p < pe) {
281 *p = 1UL << i;
282 i = (i + 1 + (((unsigned long) p) >> 7)) % 32;
283 p++;
284 } /* endwhile */
285}
286
287/*
288 * checks the memblock of <size> bytes from <startaddr>
289 * returns the address of the error or NULL if all is well
290 */
291
292void *RAM_MemTest_CheckWalkBit (int mode, unsigned long startaddr,
293 unsigned long size)
294{
295 volatile unsigned long *p, *pe;
296 unsigned long actual, expected;
297 unsigned long i;
298
299 p = (unsigned long *) startaddr;
300 pe = (unsigned long *) (startaddr + size);
301 i = 0;
302
303 while (p < pe) {
304 actual = *p;
305 expected = (1UL << i);
306 if (actual != expected) {
307 Write_Error (mode, (unsigned long) p, expected, actual);
308 return ((void *) p);
309 } /* endif */
310 i = (i + 1 + (((unsigned long) p) >> 7)) % 32;
311 p++;
312 } /* endwhile */
313
314 return (NULL);
315}
316
317/*
318 * fills the memblock of <size> bytes from <startaddr> with "random" pattern
319 */
320
321void RAM_MemTest_WriteRandomPattern (unsigned long startaddr,
322 unsigned long size,
323 unsigned long *pat)
324{
325 unsigned long i, p;
326
327 p = *pat;
328
329 for (i = 0; i < (size / 4); i++) {
330 *(unsigned long *) (startaddr + i * 4) = p;
331 if ((p % 2) > 0) {
332 p ^= i;
333 p >>= 1;
334 p |= 0x80000000;
335 } else {
336 p ^= ~i;
337 p >>= 1;
338 } /* endif */
339 } /* endfor */
340 *pat = p;
341}
342
343/*
344 * checks the memblock of <size> bytes from <startaddr>
345 * returns the address of the error or NULL if all is well
346 */
347
348void *RAM_MemTest_CheckRandomPattern (int mode, unsigned long startaddr,
349 unsigned long size,
350 unsigned long *pat)
351{
352 void *perr = NULL;
353 unsigned long i, p, p1;
354
355 p = *pat;
356
357 for (i = 0; i < (size / 4); i++) {
358 p1 = *(unsigned long *) (startaddr + i * 4);
359 if (p1 != p) {
360 if (perr == NULL) {
361 Write_Error (mode, startaddr + i * 4, p, p1);
362 perr = (void *) (startaddr + i * 4);
363 } /* endif */
364 }
365 /* endif */
366 if ((p % 2) > 0) {
367 p ^= i;
368 p >>= 1;
369 p |= 0x80000000;
370 } else {
371 p ^= ~i;
372 p >>= 1;
373 } /* endif */
374 } /* endfor */
375
376 *pat = p;
377 return (perr);
378}
379
380
381void RAM_MemTest_WriteData1 (unsigned long startaddr, unsigned long size,
382 unsigned long *pat)
383{
384 RAM_MemTest_WritePattern2 (startaddr, size, TESTPAT1, TESTPAT2);
385}
386
387void *RAM_MemTest_CheckData1 (int mode, unsigned long startaddr,
388 unsigned long size, unsigned long *pat)
389{
390 return (RAM_MemTest_CheckPattern2
391 (mode, startaddr, size, TESTPAT1, TESTPAT2));
392}
393
394void RAM_MemTest_WriteData2 (unsigned long startaddr, unsigned long size,
395 unsigned long *pat)
396{
397 RAM_MemTest_WritePattern2 (startaddr, size, TESTPAT2, TESTPAT1);
398}
399
400void *RAM_MemTest_CheckData2 (int mode, unsigned long startaddr,
401 unsigned long size, unsigned long *pat)
402{
403 return (RAM_MemTest_CheckPattern2
404 (mode, startaddr, size, TESTPAT2, TESTPAT1));
405}
406
407void RAM_MemTest_WriteAddr1 (unsigned long startaddr, unsigned long size,
408 unsigned long *pat)
409{
410 RAM_MemTest_WriteAddrLine (startaddr, size, FALSE);
411}
412
413void *RAM_MemTest_Check1Addr1 (int mode, unsigned long startaddr,
414 unsigned long size, unsigned long *pat)
415{
416 return (RAM_MemTest_CheckAddrLine (mode, startaddr, size, FALSE));
417}
418
419void *RAM_MemTest_Check2Addr1 (int mode, unsigned long startaddr,
420 unsigned long size, unsigned long *pat)
421{
422 return (RAM_MemTest_CheckAddrLineReverse
423 (mode, startaddr, size, FALSE));
424}
425
426void RAM_MemTest_WriteAddr2 (unsigned long startaddr, unsigned long size,
427 unsigned long *pat)
428{
429 RAM_MemTest_WriteAddrLine (startaddr, size, TRUE);
430}
431
432void *RAM_MemTest_Check1Addr2 (int mode, unsigned long startaddr,
433 unsigned long size, unsigned long *pat)
434{
435 return (RAM_MemTest_CheckAddrLine (mode, startaddr, size, TRUE));
436}
437
438void *RAM_MemTest_Check2Addr2 (int mode, unsigned long startaddr,
439 unsigned long size, unsigned long *pat)
440{
441 return (RAM_MemTest_CheckAddrLineReverse
442 (mode, startaddr, size, TRUE));
443}
444
445
wdenk67c4f482002-08-26 22:23:10 +0000446typedef struct {
447 void (*test_write) (unsigned long startaddr, unsigned long size,
448 unsigned long *pat);
449 char *test_write_desc;
450 void *(*test_check1) (int mode, unsigned long startaddr,
451 unsigned long size, unsigned long *pat);
452 void *(*test_check2) (int mode, unsigned long startaddr,
453 unsigned long size, unsigned long *pat);
454} RAM_MEMTEST_FUNC;
455
456
457#define TEST_STAGES 5
wdenk33149b82003-05-23 11:38:58 +0000458static RAM_MEMTEST_FUNC test_stage[TEST_STAGES] = {
wdenk67c4f482002-08-26 22:23:10 +0000459 {RAM_MemTest_WriteData1, "data test 1...\n", RAM_MemTest_CheckData1,
460 NULL},
461 {RAM_MemTest_WriteData2, "data test 2...\n", RAM_MemTest_CheckData2,
462 NULL},
463 {RAM_MemTest_WriteAddr1, "address line test...\n",
464 RAM_MemTest_Check1Addr1, RAM_MemTest_Check2Addr1},
465 {RAM_MemTest_WriteAddr2, "address line test (swapped)...\n",
466 RAM_MemTest_Check1Addr2, RAM_MemTest_Check2Addr2},
467 {RAM_MemTest_WriteRandomPattern, "random data test...\n",
468 RAM_MemTest_CheckRandomPattern, NULL}
469};
470
wdenk33149b82003-05-23 11:38:58 +0000471void mem_test_reloc(void)
472{
wdenk33149b82003-05-23 11:38:58 +0000473 unsigned long addr;
474 int i;
475 for (i=0; i< TEST_STAGES; i++) {
Wolfgang Denk53677ef2008-05-20 16:00:29 +0200476 addr = (ulong) (test_stage[i].test_write) + gd->reloc_off;
wdenk33149b82003-05-23 11:38:58 +0000477 test_stage[i].test_write=
478 (void (*) (unsigned long startaddr, unsigned long size,
479 unsigned long *pat))addr;
Wolfgang Denk53677ef2008-05-20 16:00:29 +0200480 addr = (ulong) (test_stage[i].test_write_desc) + gd->reloc_off;
wdenk33149b82003-05-23 11:38:58 +0000481 test_stage[i].test_write_desc=(char *)addr;
Wolfgang Denk53677ef2008-05-20 16:00:29 +0200482 if(test_stage[i].test_check1) {
wdenk33149b82003-05-23 11:38:58 +0000483 addr = (ulong) (test_stage[i].test_check1) + gd->reloc_off;
484 test_stage[i].test_check1=
485 (void *(*) (int mode, unsigned long startaddr,
486 unsigned long size, unsigned long *pat))addr;
487 }
Wolfgang Denk53677ef2008-05-20 16:00:29 +0200488 if(test_stage[i].test_check2) {
wdenk33149b82003-05-23 11:38:58 +0000489 addr = (ulong) (test_stage[i].test_check2) + gd->reloc_off;
490 test_stage[i].test_check2=
491 (void *(*) (int mode, unsigned long startaddr,
492 unsigned long size, unsigned long *pat))addr;
493 }
494 }
495}
wdenk67c4f482002-08-26 22:23:10 +0000496
497
wdenk27b207f2003-07-24 23:38:38 +0000498int mem_test (unsigned long start, unsigned long ramsize, int quiet)
wdenk67c4f482002-08-26 22:23:10 +0000499{
500 unsigned long errors, stage;
501 unsigned long startaddr, size, i;
502 const unsigned long blocksize = 0x80000; /* check in 512KB blocks */
503 unsigned long *perr;
504 unsigned long rdatapat;
505 char dispbuf[80];
506 int status = TEST_PASSED;
507 int prog = 0;
508
509 errors = 0;
510 startaddr = start;
511 size = ramsize;
512 if ((quiet & TEST_SHOW_PROG) == TEST_SHOW_PROG) {
513 prog++;
514 printf (".");
515 }
516 sprintf (dispbuf, "\nMemory Test: addr = 0x%lx size = 0x%lx\n",
517 startaddr, size);
518 testm_puts (quiet, dispbuf);
519 for (stage = 0; stage < TEST_STAGES; stage++) {
520 sprintf (dispbuf, test_stage[stage].test_write_desc);
521 testm_puts (quiet, dispbuf);
522 /* fill SDRAM */
523 rdatapat = 0x12345678;
524 sprintf (dispbuf, "writing block: ");
525 testm_puts (quiet, dispbuf);
526 for (i = 0; i < size; i += blocksize) {
527 sprintf (dispbuf, "%04lX\b\b\b\b", i / blocksize);
528 testm_puts (quiet, dispbuf);
529 test_stage[stage].test_write (startaddr + i, blocksize,
530 &rdatapat);
531 } /* endfor */
532 sprintf (dispbuf, "\n");
533 testm_puts (quiet, dispbuf);
534 if ((quiet & TEST_SHOW_PROG) == TEST_SHOW_PROG) {
535 prog++;
536 printf (".");
537 }
538 /* check SDRAM */
539 rdatapat = 0x12345678;
540 sprintf (dispbuf, "checking block: ");
541 testm_puts (quiet, dispbuf);
542 for (i = 0; i < size; i += blocksize) {
543 sprintf (dispbuf, "%04lX\b\b\b\b", i / blocksize);
544 testm_puts (quiet, dispbuf);
545 if ((perr =
546 test_stage[stage].test_check1 (quiet, startaddr + i,
547 blocksize,
548 &rdatapat)) != NULL) {
549 status = TEST_FAILED;
550 } /* endif */
551 } /* endfor */
552 sprintf (dispbuf, "\n");
553 testm_puts (quiet, dispbuf);
554 if ((quiet & TEST_SHOW_PROG) == TEST_SHOW_PROG) {
555 prog++;
556 printf (".");
557 }
558 if (test_stage[stage].test_check2 != NULL) {
559 /* check2 SDRAM */
560 sprintf (dispbuf, "2nd checking block: ");
561 rdatapat = 0x12345678;
562 testm_puts (quiet, dispbuf);
563 for (i = 0; i < size; i += blocksize) {
564 sprintf (dispbuf, "%04lX\b\b\b\b", i / blocksize);
565 testm_puts (quiet, dispbuf);
566 if ((perr =
567 test_stage[stage].test_check2 (quiet, startaddr + i,
568 blocksize,
569 &rdatapat)) != NULL) {
570 status = TEST_FAILED;
571 } /* endif */
572 } /* endfor */
573 sprintf (dispbuf, "\n");
574 testm_puts (quiet, dispbuf);
575 if ((quiet & TEST_SHOW_PROG) == TEST_SHOW_PROG) {
576 prog++;
577 printf (".");
578 }
579 }
580
581 } /* next stage */
582 if ((quiet & TEST_SHOW_PROG) == TEST_SHOW_PROG) {
583 while (prog-- > 0)
584 printf ("\b \b");
585 }
586
587 if (status == TEST_FAILED)
588 errors++;
589
590 return (errors);
591}