blob: 93d1100717f8fe5216574c9ccfca3bd05074a993 [file] [log] [blame]
Kumar Gala0e7927d2008-08-27 01:04:07 -05001/*
2 * Copyright 2008 Freescale Semiconductor, Inc.
3 *
4 * This program is free software; you can redistribute it and/or
5 * modify it under the terms of the GNU General Public License
6 * Version 2 as published by the Free Software Foundation.
7 */
8
9#include <common.h>
10#include <i2c.h>
11
12#include <asm/fsl_ddr_sdram.h>
Haiying Wangdfb49102008-10-03 12:36:55 -040013#include <asm/fsl_ddr_dimm_params.h>
Kumar Gala0e7927d2008-08-27 01:04:07 -050014
15static void
16get_spd(ddr1_spd_eeprom_t *spd, unsigned char i2c_address)
17{
18 i2c_read(i2c_address, 0, 1, (uchar *)spd, sizeof(ddr1_spd_eeprom_t));
19}
20
21
22unsigned int
23fsl_ddr_get_mem_data_rate(void)
24{
25 return get_ddr_freq(0);
26}
27
28
29void
30fsl_ddr_get_spd(ddr1_spd_eeprom_t *ctrl_dimms_spd,
31 unsigned int ctrl_num)
32{
33 unsigned int i;
34 unsigned int i2c_address = 0;
35
36 for (i = 0; i < CONFIG_DIMM_SLOTS_PER_CTLR; i++) {
37 if (ctrl_num == 0 && i == 0) {
38 i2c_address = SPD_EEPROM_ADDRESS;
39 }
40 get_spd(&(ctrl_dimms_spd[i]), i2c_address);
41 }
42}
43
Haiying Wangdfb49102008-10-03 12:36:55 -040044void fsl_ddr_board_options(memctl_options_t *popts,
45 dimm_params_t *pdimm,
46 unsigned int ctrl_num)
Kumar Gala0e7927d2008-08-27 01:04:07 -050047{
48 /*
49 * Factors to consider for CPO:
50 * - frequency
51 * - ddr1 vs. ddr2
52 */
53 popts->cpo_override = 0;
54
55 /*
56 * Factors to consider for write data delay:
57 * - number of DIMMs
58 *
59 * 1 = 1/4 clock delay
60 * 2 = 1/2 clock delay
61 * 3 = 3/4 clock delay
62 * 4 = 1 clock delay
63 * 5 = 5/4 clock delay
64 * 6 = 3/2 clock delay
65 */
66 popts->write_data_delay = 3;
67
Dave Liub4983e12008-11-21 16:31:43 +080068 /* 2T timing enable */
69 popts->twoT_en = 1;
70
Kumar Gala0e7927d2008-08-27 01:04:07 -050071 /*
72 * Factors to consider for half-strength driver enable:
73 * - number of DIMMs installed
74 */
75 popts->half_strength_driver_enable = 0;
76}