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Tom Rini83d290c2018-05-06 17:58:06 -04001/* SPDX-License-Identifier: GPL-2.0+ */
Vikas Manochae66c49f2016-02-11 15:47:20 -08002/*
Patrice Chotard3bc599c2017-10-23 09:53:58 +02003 * Copyright (C) 2016, STMicroelectronics - All Rights Reserved
4 * Author(s): Vikas Manocha, <vikas.manocha@st.com> for STMicroelectronics.
Vikas Manochae66c49f2016-02-11 15:47:20 -08005 */
6
7#ifndef __CONFIG_H
8#define __CONFIG_H
9
Vikas Manochae66c49f2016-02-11 15:47:20 -080010#define CONFIG_SYS_FLASH_BASE 0x08000000
11#define CONFIG_SYS_INIT_SP_ADDR 0x20050000
Vikas Manochab9747692017-05-28 12:55:10 -070012
13#ifdef CONFIG_SUPPORT_SPL
Vikas Manocha1a73bd82017-05-28 12:55:14 -070014#define CONFIG_SYS_LOAD_ADDR 0x08008000
Vikas Manochab9747692017-05-28 12:55:10 -070015#else
Vikas Manocha1a73bd82017-05-28 12:55:14 -070016#define CONFIG_SYS_LOAD_ADDR 0xC0400000
17#define CONFIG_LOADADDR 0xC0400000
Vikas Manochab9747692017-05-28 12:55:10 -070018#endif
Vikas Manochae66c49f2016-02-11 15:47:20 -080019
Vikas Manochae66c49f2016-02-11 15:47:20 -080020/*
21 * Configuration of the external SDRAM memory
22 */
Vikas Manochae66c49f2016-02-11 15:47:20 -080023
Vikas Manochaadcc90b2016-03-09 15:18:14 -080024#define CONFIG_SYS_MAX_FLASH_SECT 8
25#define CONFIG_SYS_MAX_FLASH_BANKS 1
Vikas Manochae66c49f2016-02-11 15:47:20 -080026
Vikas Manochae66c49f2016-02-11 15:47:20 -080027#define CONFIG_ENV_SIZE (8 << 10)
28
Vikas Manochaadcc90b2016-03-09 15:18:14 -080029#define CONFIG_STM32_FLASH
Vikas Manochae66c49f2016-02-11 15:47:20 -080030
Michael Kurzb20b70f2017-01-22 16:04:27 +010031#define CONFIG_DW_GMAC_DEFAULT_DMA_PBL (8)
32#define CONFIG_DW_ALTDESCRIPTOR
Michael Kurzfc0d3db2017-01-22 16:04:29 +010033#define CONFIG_PHY_SMSC
Michael Kurzb20b70f2017-01-22 16:04:27 +010034
Vikas Manochae66c49f2016-02-11 15:47:20 -080035#define CONFIG_SYS_HZ_CLOCK 1000000 /* Timer is clocked at 1MHz */
36
37#define CONFIG_CMDLINE_TAG
38#define CONFIG_SETUP_MEMORY_TAGS
39#define CONFIG_INITRD_TAG
40#define CONFIG_REVISION_TAG
41
42#define CONFIG_SYS_CBSIZE 1024
Vikas Manochae66c49f2016-02-11 15:47:20 -080043
Michael Kurzb20b70f2017-01-22 16:04:27 +010044#define CONFIG_SYS_MALLOC_LEN (1 * 1024 * 1024)
Vikas Manochae66c49f2016-02-11 15:47:20 -080045
Patrice Chotard019ce052019-02-21 10:07:54 +010046#define BOOT_TARGET_DEVICES(func) \
47 func(MMC, mmc, 0)
Vikas Manochae66c49f2016-02-11 15:47:20 -080048
Patrice Chotard019ce052019-02-21 10:07:54 +010049#include <config_distro_bootcmd.h>
50#define CONFIG_EXTRA_ENV_SETTINGS \
51 "kernel_addr_r=0xC0008000\0" \
52 "fdtfile=stm32f746-disco.dtb\0" \
53 "fdt_addr_r=0xC0500000\0" \
54 "scriptaddr=0xC0008000\0" \
55 "pxefile_addr_r=0xC0008000\0" \
56 "fdt_high=0xffffffffffffffff\0" \
57 "initrd_high=0xffffffffffffffff\0" \
58 "ramdisk_addr_r=0xD0900000\0" \
59 BOOTENV
Vikas Manochae66c49f2016-02-11 15:47:20 -080060
61/*
62 * Command line configuration.
63 */
Vikas Manocha2f80a9f2017-04-10 15:03:00 -070064#define CONFIG_BOARD_LATE_INIT
Vikas Manochaa241c242017-04-10 15:03:02 -070065#define CONFIG_DISPLAY_BOARDINFO
Vikas Manochab9747692017-05-28 12:55:10 -070066
67/* For SPL */
68#ifdef CONFIG_SUPPORT_SPL
69#define CONFIG_SPL_STACK CONFIG_SYS_INIT_SP_ADDR
Vikas Manochab9747692017-05-28 12:55:10 -070070#define CONFIG_SPL_TEXT_BASE CONFIG_SYS_FLASH_BASE
71#define CONFIG_SYS_MONITOR_LEN (512 * 1024)
72#define CONFIG_SYS_SPL_LEN 0x00008000
Vikas Manocha1a73bd82017-05-28 12:55:14 -070073#define CONFIG_SYS_UBOOT_START 0x080083FD
Vikas Manochab9747692017-05-28 12:55:10 -070074#define CONFIG_SYS_UBOOT_BASE (CONFIG_SYS_FLASH_BASE + \
75 CONFIG_SYS_SPL_LEN)
Vikas Manocha55a3ef72017-05-28 12:55:13 -070076
Vikas Manocha55a3ef72017-05-28 12:55:13 -070077/* DT blob (fdt) address */
Vikas Manocha55a3ef72017-05-28 12:55:13 -070078#define CONFIG_SYS_FDT_BASE (CONFIG_SYS_FLASH_BASE + \
79 0x1C0000)
Vikas Manochab9747692017-05-28 12:55:10 -070080#endif
81/* For SPL ends */
82
yannick fertre92eac582018-03-02 15:59:28 +010083/* For splashcreen */
84#ifdef CONFIG_DM_VIDEO
85#define CONFIG_VIDEO_BMP_RLE8
86#define CONFIG_BMP_16BPP
87#define CONFIG_BMP_24BPP
88#define CONFIG_BMP_32BPP
89#define CONFIG_SPLASH_SCREEN
90#define CONFIG_SPLASH_SCREEN_ALIGN
91#endif
92
Vikas Manochae66c49f2016-02-11 15:47:20 -080093#endif /* __CONFIG_H */