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Ricardo Ribalda Delgado086511f2008-07-17 12:47:09 +02001/*
2 * (C) Copyright 2008
3 * Ricado Ribalda-Universidad Autonoma de Madrid-ricardo.ribalda@uam.es
4 * This work has been supported by: QTechnology http://qtec.com/
5 * This program is free software: you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by
7 * the Free Software Foundation, either version 2 of the License, or
8 * (at your option) any later version.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 * You should have received a copy of the GNU General Public License
15 * along with this program. If not, see <http://www.gnu.org/licenses/>.
16*/
17
18#ifndef __CONFIG_H
19#define __CONFIG_H
20/*
21#define DEBUG
22#define ET_DEBUG
23*/
24 /*CPU*/
25#define CONFIG_XILINX_ML507 1
26#define CONFIG_XILINX_440 1
27#define CONFIG_440 1
28#define CONFIG_4xx 1
29#include "../board/xilinx/ml507/xparameters.h"
30
31/*Mem Map*/
32#define CFG_SDRAM_BASE 0x0
33#define CFG_SDRAM_SIZE_MB 256
Ricardo Ribalda Delgado01a00432008-07-21 20:30:07 +020034#define CFG_MONITOR_BASE TEXT_BASE
Ricardo Ribalda Delgado086511f2008-07-17 12:47:09 +020035#define CFG_MONITOR_LEN ( 192 * 1024 )
36#define CFG_MALLOC_LEN ( 128 * 1024 )
Ricardo Ribalda Delgado086511f2008-07-17 12:47:09 +020037
38/*Uart*/
39#define CONFIG_XILINX_UARTLITE
Ricardo Ribalda Delgado01a00432008-07-21 20:30:07 +020040#define CONFIG_BAUDRATE XPAR_UARTLITE_0_BAUDRATE
41#define CFG_BAUDRATE_TABLE { XPAR_UARTLITE_0_BAUDRATE }
Ricardo Ribalda Delgado086511f2008-07-17 12:47:09 +020042#define CONFIG_SERIAL_BASE XPAR_UARTLITE_0_BASEADDR
43
44/*Cmd*/
45#include <config_cmd_default.h>
46#define CONFIG_CMD_ASKENV
47#define CONFIG_CMD_CACHE
48#define CONFIG_CMD_DIAG
49#define CONFIG_CMD_ELF
50#define CONFIG_CMD_IRQ
51#define CONFIG_CMD_REGINFO
52#undef CONFIG_CMD_I2C
53#undef CONFIG_CMD_DTT
54#undef CONFIG_CMD_NET
55#undef CONFIG_CMD_PING
56#undef CONFIG_CMD_DHCP
57#undef CONFIG_CMD_EEPROM
58#undef CONFIG_CMD_IMLS
59
60/*Env*/
61#define CFG_ENV_IS_NOWHERE
62#define CFG_ENV_SIZE 0x200
63#define CFG_ENV_OFFSET 0x100
64
65/*Misc*/
66#define CONFIG_BOOTDELAY 5 /* autoboot after 5 seconds */
67#define CFG_LONGHELP /* undef to save memory */
68#define CFG_PROMPT "board:/# " /* Monitor Command Prompt */
69#if defined(CONFIG_CMD_KGDB)
70#define CFG_CBSIZE 1024 /* Console I/O Buffer Size */
71#else
72#define CFG_CBSIZE 256 /* Console I/O Buffer Size */
73#endif
74#define CFG_PBSIZE ( CFG_CBSIZE + sizeof( CFG_PROMPT ) + 16 )
75#define CFG_MAXARGS 16 /* max number of command args */
76#define CFG_BARGSIZE CFG_CBSIZE /* Boot Argument Buffer Size */
Ricardo Ribalda Delgado01a00432008-07-21 20:30:07 +020077#define CFG_MEMTEST_START 0x00400000 /* memtest works on */
78#define CFG_MEMTEST_END 0x00C00000 /* 4 ... 12 MB in DRAM */
79#define CFG_LOAD_ADDR 0x00400000 /* default load address */
Ricardo Ribalda Delgado086511f2008-07-17 12:47:09 +020080#define CFG_EXTBDINFO 1 /* Extended board_into (bd_t) */
81#define CFG_HZ 1000 /* decrementer freq: 1 ms ticks */
82#define CONFIG_CMDLINE_EDITING /* add command line history */
83#define CONFIG_AUTO_COMPLETE /* add autocompletion support */
84#define CONFIG_LOOPW /* enable loopw command */
85#define CONFIG_MX_CYCLIC /* enable mdc/mwc commands */
86#define CONFIG_ZERO_BOOTDELAY_CHECK /* check for keypress on bootdelay==0 */
87#define CONFIG_VERSION_VARIABLE /* include version env variable */
88#define CFG_CONSOLE_INFO_QUIET /* don't print console @ startup */
89#define CFG_HUSH_PARSER /* Use the HUSH parser */
90#define CFG_PROMPT_HUSH_PS2 "> "
91#define CONFIG_LOADS_ECHO /* echo on for serial download */
92#define CFG_LOADS_BAUD_CHANGE /* allow baudrate change */
93#define CFG_BOOTMAPSZ ( 8 << 20 ) /* Initial Memory map for Linux */
94#define CONFIG_PREBOOT "echo U-Boot is up and runnining;"
95
96/*Stack*/
97#define CFG_INIT_RAM_ADDR 0x800000 /* Initial RAM address */
98#define CFG_INIT_RAM_END 0x2000 /* End of used area in RAM */
99#define CFG_GBL_DATA_SIZE 128 /* num bytes initial data */
100#define CFG_GBL_DATA_OFFSET ( CFG_INIT_RAM_END - CFG_GBL_DATA_SIZE )
101#define CFG_INIT_SP_OFFSET CFG_GBL_DATA_OFFSET
102/*Speed*/
Ricardo Ribalda Delgado01a00432008-07-21 20:30:07 +0200103#define CONFIG_SYS_CLK_FREQ XPAR_CORE_CLOCK_FREQ_HZ
Ricardo Ribalda Delgado086511f2008-07-17 12:47:09 +0200104
105/*Flash*/
106#define CFG_FLASH_BASE XPAR_FLASH_MEM0_BASEADDR
107#define CFG_FLASH_SIZE (32*1024*1024)
108#define CFG_FLASH_CFI 1
109#define CFG_FLASH_CFI_DRIVER 1
110#define CFG_FLASH_EMPTY_INFO 1
111#define CFG_MAX_FLASH_BANKS 1
Ricardo Ribalda Delgado01a00432008-07-21 20:30:07 +0200112#define CFG_MAX_FLASH_SECT 259
Ricardo Ribalda Delgado086511f2008-07-17 12:47:09 +0200113#define CFG_FLASH_PROTECTION
114
115#endif /* __CONFIG_H */