blob: 13eac75f8d32482ec9704b3650c9a15f9af08d30 [file] [log] [blame]
Eddy Petrișor9702ec02016-06-05 03:43:00 +03001/*
2 * (C) Copyright 2015-2016 Freescale Semiconductor, Inc.
3 *
4 * SPDX-License-Identifier: GPL-2.0+
5 *
6 * Configuration settings for the Freescale S32V234 EVB board.
7 */
8
9#ifndef __CONFIG_H
10#define __CONFIG_H
11
12#ifndef CONFIG_SPL_BUILD
13#include <config_distro_defaults.h>
14#endif
15
16#include <asm/arch/imx-regs.h>
17
18#define CONFIG_S32V234
19#define CONFIG_DM
20
21#define CONFIG_DISPLAY_CPUINFO
22#define CONFIG_DISPLAY_BOARDINFO
23
24/* Config GIC */
25#define CONFIG_GICV2
26#define GICD_BASE 0x7D001000
27#define GICC_BASE 0x7D002000
28
29#define CONFIG_REMAKE_ELF
30#undef CONFIG_RUN_FROM_IRAM_ONLY
31
32#define CONFIG_RUN_FROM_DDR1
33#undef CONFIG_RUN_FROM_DDR0
34
35/* Run by default from DDR1 */
36#ifdef CONFIG_RUN_FROM_DDR0
37#define DDR_BASE_ADDR 0x80000000
38#else
39#define DDR_BASE_ADDR 0xC0000000
40#endif
41
42#define CONFIG_MACH_TYPE 4146
43
44#define CONFIG_SKIP_LOWLEVEL_INIT
45
46/* Config CACHE */
47#define CONFIG_CMD_CACHE
48
49#define CONFIG_SYS_FULL_VA
50
51/* Enable passing of ATAGs */
52#define CONFIG_CMDLINE_TAG
53
54/* SMP Spin Table Definitions */
55#define CPU_RELEASE_ADDR (CONFIG_SYS_SDRAM_BASE + 0x7fff0)
56
57/* Generic Timer Definitions */
58#define COUNTER_FREQUENCY (1000000000) /* 1000MHz */
59#define CONFIG_SYS_FSL_ERRATUM_A008585
60
61/* Size of malloc() pool */
62#ifdef CONFIG_RUN_FROM_IRAM_ONLY
63#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 1 * 1024 * 1024)
64#else
65#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 2 * 1024 * 1024)
66#endif
67#define CONFIG_BOARD_EARLY_INIT_F
68
69#define CONFIG_DM_SERIAL
70#define CONFIG_FSL_LINFLEXUART
71#define LINFLEXUART_BASE LINFLEXD0_BASE_ADDR
72
73#define CONFIG_DEBUG_UART_LINFLEXUART
74#define CONFIG_DEBUG_UART_BASE LINFLEXUART_BASE
75
76/* Allow to overwrite serial and ethaddr */
77#define CONFIG_ENV_OVERWRITE
78#define CONFIG_SYS_UART_PORT (1)
79#define CONFIG_BAUDRATE 115200
80
81#undef CONFIG_CMD_IMLS
82
83#define CONFIG_MMC
84#define CONFIG_FSL_ESDHC
85#define CONFIG_FSL_USDHC
86#define CONFIG_SYS_FSL_ESDHC_ADDR USDHC_BASE_ADDR
87#define CONFIG_SYS_FSL_ESDHC_NUM 1
88
89#define CONFIG_SYS_FSL_ERRATUM_ESDHC111
90
91#define CONFIG_CMD_MMC
92#define CONFIG_GENERIC_MMC
93/* #define CONFIG_CMD_EXT2 EXT2 Support */
94#define CONFIG_CMD_FAT /* FAT support */
95#define CONFIG_DOS_PARTITION
96
97#if 0
98
99/* Ethernet config */
100#define CONFIG_CMD_PING
101#define CONFIG_CMD_DHCP
102#define CONFIG_CMD_MII
103#define CONFIG_FEC_MXC
104#define CONFIG_MII
105#define IMX_FEC_BASE ENET_BASE_ADDR
106#define CONFIG_FEC_XCV_TYPE RMII
107#define CONFIG_FEC_MXC_PHYADDR 0
108#define CONFIG_PHYLIB
109#define CONFIG_PHY_MICREL
110#endif
111
112#if 0 /* Disable until the I2C driver will be updated */
113
114/* I2C Configs */
115#define CONFIG_CMD_I2C
116#define CONFIG_HARD_I2C
117#define CONFIG_I2C_MXC
118#define CONFIG_SYS_I2C_BASE I2C0_BASE_ADDR
119#define CONFIG_SYS_I2C_SPEED 100000
120#endif
121
122#if 0 /* Disable until the FLASH will be implemented */
123#define CONFIG_SYS_USE_NAND
124#endif
125
126#ifdef CONFIG_SYS_USE_NAND
127/* Nand Flash Configs */
128#define CONFIG_CMD_NAND
129#define CONFIG_JFFS2_NAND
130#define MTD_NAND_FSL_NFC_SWECC 1
131#define CONFIG_NAND_FSL_NFC
132#define CONFIG_SYS_NAND_BASE 0x400E0000
133#define CONFIG_SYS_MAX_NAND_DEVICE 1
134#define NAND_MAX_CHIPS CONFIG_SYS_MAX_NAND_DEVICE
135#define CONFIG_SYS_NAND_SELECT_DEVICE
136#define CONFIG_SYS_64BIT_VSPRINTF /* needed for nand_util.c */
137#endif
138
139#define CONFIG_CMD_DHCP
140
141#define CONFIG_LOADADDR 0xC307FFC0
142#define CONFIG_BOOTARGS "console=ttyLF0 root=/dev/ram rw"
143
144#define CONFIG_CMD_ENV
145#define CONFIG_EXTRA_ENV_SETTINGS \
146 "boot_scripts=boot.scr.uimg boot.scr\0" \
147 "scriptaddr=" __stringify(CONFIG_LOADADDR) "\0" \
148 "console=ttyLF0,115200\0" \
149 "fdt_file=s32v234-evb.dtb\0" \
150 "fdt_high=0xffffffff\0" \
151 "initrd_high=0xffffffff\0" \
152 "fdt_addr_r=0xC2000000\0" \
153 "kernel_addr_r=0xC307FFC0\0" \
154 "ramdisk_addr_r=0xC4000000\0" \
155 "ramdisk=rootfs.uimg\0"\
156 "ip_dyn=yes\0" \
157 "mmcdev=" __stringify(CONFIG_SYS_MMC_ENV_DEV) "\0" \
158 "update_sd_firmware_filename=u-boot.imx\0" \
159 "update_sd_firmware=" \
160 "if test ${ip_dyn} = yes; then " \
161 "setenv get_cmd dhcp; " \
162 "else " \
163 "setenv get_cmd tftp; " \
164 "fi; " \
165 "if mmc dev ${mmcdev}; then " \
166 "if ${get_cmd} ${update_sd_firmware_filename}; then " \
167 "setexpr fw_sz ${filesize} / 0x200; " \
168 "setexpr fw_sz ${fw_sz} + 1; " \
169 "mmc write ${loadaddr} 0x2 ${fw_sz}; " \
170 "fi; " \
171 "fi\0" \
172 "loadramdisk=fatload mmc ${mmcdev}:${mmcpart} ${ramdisk_addr} ${ramdisk}\0" \
173 "jtagboot=echo Booting using jtag...; " \
174 "bootm ${kernel_addr} ${ramdisk_addr} ${fdt_addr}\0" \
175 "jtagsdboot=echo Booting loading Linux with ramdisk from SD...; " \
176 "run loaduimage; run loadramdisk; run loadfdt;"\
177 "bootm ${kernel_addr} ${ramdisk_addr} ${fdt_addr}\0" \
178 "boot_net_usb_start=true\0" \
179 BOOTENV
180
181#define BOOT_TARGET_DEVICES(func) \
182 func(MMC, mmc, 1) \
183 func(MMC, mmc, 0) \
184 func(DHCP, dhcp, na)
185
186#define CONFIG_BOOTCOMMAND \
187 "run distro_bootcmd"
188
189#include <config_distro_bootcmd.h>
190
191/* Miscellaneous configurable options */
192#define CONFIG_SYS_LONGHELP /* undef to save memory */
Eddy Petrișor9702ec02016-06-05 03:43:00 +0300193#define CONFIG_SYS_PROMPT_HUSH_PS2 "> "
194#define CONFIG_SYS_PROMPT "=> "
195#undef CONFIG_AUTO_COMPLETE
196#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
197#define CONFIG_SYS_PBSIZE \
198 (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
199#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
200#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
201#define CONFIG_CMDLINE_EDITING
202
203#define CONFIG_CMD_MEMTEST
204#define CONFIG_SYS_MEMTEST_START (DDR_BASE_ADDR)
205#define CONFIG_SYS_MEMTEST_END (DDR_BASE_ADDR + 0x7C00000)
206
207#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
208#define CONFIG_SYS_HZ 1000
209
210#define CONFIG_SYS_TEXT_BASE 0x3E800000 /* SDRAM */
211
212#ifdef CONFIG_RUN_FROM_IRAM_ONLY
213#define CONFIG_SYS_MALLOC_BASE (DDR_BASE_ADDR)
214#endif
215
216/*
217 * Stack sizes
218 * The stack sizes are set up in start.S using the settings below
219 */
220#define CONFIG_STACKSIZE (128 * 1024) /* regular stack */
221
222#if 0
223/* Configure PXE */
224#define CONFIG_CMD_PXE
225#define CONFIG_BOOTP_PXE
226#define CONFIG_BOOTP_PXE_CLIENTARCH 0x100
227#endif
228
229/* Physical memory map */
230/* EVB board has 2x256 MB DDR chips, DDR0 and DDR1, u-boot is using just one */
231#define CONFIG_NR_DRAM_BANKS 1
232#define PHYS_SDRAM (DDR_BASE_ADDR)
233#define PHYS_SDRAM_SIZE (256 * 1024 * 1024)
234
235#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM
236#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
237#define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE
238
239#define CONFIG_SYS_INIT_SP_OFFSET \
240 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
241#define CONFIG_SYS_INIT_SP_ADDR \
242 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
243
244/* FLASH and environment organization */
245#define CONFIG_SYS_NO_FLASH
246
247#define CONFIG_ENV_SIZE (8 * 1024)
248#define CONFIG_ENV_IS_IN_MMC
249
250#define CONFIG_ENV_OFFSET (12 * 64 * 1024)
251#define CONFIG_SYS_MMC_ENV_DEV 0
252
253
254#define CONFIG_BOOTP_BOOTFILESIZE
255#define CONFIG_BOOTP_BOOTPATH
256#define CONFIG_BOOTP_GATEWAY
257#define CONFIG_BOOTP_HOSTNAME
258
259#endif