| Daniel Hellstrom | cff009e | 2010-01-25 09:56:08 +0100 | [diff] [blame] | 1 | /* GRLIB Memory controller setup structures |
| 2 | * |
| 3 | * (C) Copyright 2010, 2015 |
| 4 | * Daniel Hellstrom, Cobham Gaisler, daniel@gaisler.com. |
| 5 | * |
| 6 | * SPDX-License-Identifier: GPL-2.0+ |
| 7 | */ |
| 8 | |
| 9 | #ifndef __MEMCFG_H__ |
| 10 | #define __MEMCFG_H__ |
| 11 | |
| 12 | /*********** Low Level Memory Controller Initalization ***********/ |
| 13 | |
| 14 | #ifndef __ASSEMBLER__ |
| 15 | |
| 16 | struct grlib_mctrl_handler; |
| 17 | |
| 18 | typedef void (*mctrl_handler_t)( |
| 19 | struct grlib_mctrl_handler *dev, |
| 20 | void *conf, |
| 21 | unsigned int ioarea |
| 22 | ); |
| 23 | |
| 24 | /* Memory Controller Handler Structure */ |
| 25 | struct grlib_mctrl_handler { |
| 26 | unsigned char type; /* 0x00. MASK: AHB MST&SLV, APB SLV */ |
| 27 | char index; /* 0x01. Unit number, 0, 1, 2... */ |
| 28 | char unused[2]; /* 0x02 */ |
| 29 | unsigned int ven_dev; /* 0x04. Device and Vendor */ |
| 30 | mctrl_handler_t func; /* 0x08. Memory Controller Handler */ |
| 31 | void *priv; /* 0x0c. Optional private data, ptr to |
| 32 | * info how to set up controller */ |
| 33 | }; |
| 34 | |
| 35 | extern struct grlib_mctrl_handler grlib_mctrl_handlers[]; |
| 36 | |
| 37 | #endif |
| 38 | |
| 39 | #define MH_STRUCT_SIZE (4*4) |
| 40 | #define MH_TYPE 0x00 |
| 41 | #define MH_INDEX 0x01 |
| 42 | #define MH_VENDOR_DEVICE 0x04 |
| 43 | #define MH_FUNC 0x08 |
| 44 | #define MH_PRIV 0x0c |
| 45 | |
| 46 | #define MH_TYPE_NONE DEV_NONE |
| 47 | #define MH_TYPE_AHB_MST DEV_AHB_MST |
| 48 | #define MH_TYPE_AHB_SLV DEV_AHB_SLV |
| 49 | #define MH_TYPE_APB_SLV DEV_APB_SLV |
| 50 | |
| 51 | #define MH_UNUSED {0, 0} |
| 52 | #define MH_END {DEV_NONE, 0, MH_UNUSED, AMBA_PNP_ID(0, 0), 0, 0} |
| 53 | |
| 54 | /*********** Low Level Memory Controller Initalization Handlers ***********/ |
| 55 | |
| 56 | #ifndef __ASSEMBLER__ |
| 57 | extern void _nomem_mctrl_init( |
| 58 | struct grlib_mctrl_handler *dev, |
| 59 | void *conf, |
| 60 | unsigned int ioarea_apbmst); |
| 61 | |
| 62 | struct mctrl_setup { |
| 63 | unsigned int reg_mask; /* Which registers to write */ |
| 64 | struct { |
| 65 | unsigned int mask; /* Mask used keep reg bits unchanged */ |
| 66 | unsigned int value; /* Value written to register */ |
| 67 | } regs[8]; |
| 68 | }; |
| 69 | |
| 70 | extern void _nomem_ahbmctrl_init( |
| 71 | struct grlib_mctrl_handler *dev, |
| 72 | void *conf, |
| 73 | unsigned int ioarea_apbmst); |
| 74 | |
| 75 | struct ahbmctrl_setup { |
| 76 | int ahb_mbar_no; /* MBAR to get register address from */ |
| 77 | unsigned int reg_mask; /* Which registers to write */ |
| 78 | struct { |
| 79 | unsigned int mask; /* Mask used keep reg bits unchanged */ |
| 80 | unsigned int value; /* Value written to register */ |
| 81 | } regs[8]; |
| 82 | }; |
| 83 | #endif |
| 84 | |
| 85 | /* mctrl_setup data structure defines */ |
| 86 | #define NREGS_OFS 0 |
| 87 | #define REGS_OFS 0x4 |
| 88 | #define REGS_SIZE 8 |
| 89 | |
| 90 | #endif |