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Tom Rini83d290c2018-05-06 17:58:06 -04001/* SPDX-License-Identifier: GPL-2.0+ */
Bhupesh Sharma3ffa95c2015-07-01 09:58:03 +05302/*
3 * (C) Copyright 2015 Freescale Semiconductor
4 *
Bhupesh Sharma3ffa95c2015-07-01 09:58:03 +05305 * Extracted from gic_64.S
6 */
7
8#include <config.h>
9#include <linux/linkage.h>
10#include <asm/macro.h>
11
12/*************************************************************************
13 *
14 * void ccn504_add_masters_to_dvm(CCI_MN_BASE, CCI_MN_RNF_NODEID_LIST,
15 * CCI_MN_DVM_DOMAIN_CTL_SET);
16 *
17 * Add fully-coherent masters to DVM domain
18 *
19 *************************************************************************/
20ENTRY(ccn504_add_masters_to_dvm)
21 /*
22 * x0: CCI_MN_BASE
23 * x1: CCI_MN_RNF_NODEID_LIST
24 * x2: CCI_MN_DVM_DOMAIN_CTL_SET
25 */
26
27 /* Add fully-coherent masters to DVM domain */
28 ldr x9, [x0, x1]
29 str x9, [x0, x2]
301: ldr x10, [x0, x2]
31 mvn x11, x10
32 tst x11, x10 /* Wait for domain addition to complete */
33 b.ne 1b
34
35 ret
36ENDPROC(ccn504_add_masters_to_dvm)
37
38/*************************************************************************
39 *
40 * void ccn504_set_qos(CCI_Sx_QOS_CONTROL_BASE, QoS Value);
41 *
42 * Initialize QoS settings for AR/AW override.
43 * Right now, this function sets the same QoS value for all RN-I ports
44 *
45 *************************************************************************/
46ENTRY(ccn504_set_qos)
47 /*
48 * x0: CCI_Sx_QOS_CONTROL_BASE
49 * x1: QoS Value
50 */
51
52 /* Set all RN-I ports to QoS value denoted by x1 */
53 ldr x9, [x0]
54 mov x10, x1
55 orr x9, x9, x10
56 str x9, [x0]
57
58 ret
59ENDPROC(ccn504_set_qos)
60
Prabhakar Kushwaha2b690b92016-01-25 12:08:45 +053061/*************************************************************************
62 *
63 * void ccn504_set_aux(CCI_AUX_CONTROL_BASE, Value);
64 *
65 * Initialize AUX control settings
66 *
67 *************************************************************************/
68ENTRY(ccn504_set_aux)
69 /*
70 * x0: CCI_AUX_CONTROL_BASE
71 * x1: Value
72 */
73
74 ldr x9, [x0]
75 mov x10, x1
76 orr x9, x9, x10
77 str x9, [x0]
78
79 ret
80ENDPROC(ccn504_set_aux)
81