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wdenkc6097192002-11-03 00:24:07 +00001/*
2 * (C) Copyright 2002
3 * Wolfgang Denk, DENX Software Engineering, <wd@denx.de>
4 *
5 * (C) Copyright 2002
6 * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
7 * Marius Groeger <mgroeger@sysgo.de>
8 *
9 * (C) Copyright 2002
10 * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
11 * Alex Zuepke <azu@sysgo.de>
12 *
13 * Copyright (C) 1999 2000 2001 Erik Mouw (J.A.K.Mouw@its.tudelft.nl)
14 *
15 * This program is free software; you can redistribute it and/or modify
16 * it under the terms of the GNU General Public License as published by
17 * the Free Software Foundation; either version 2 of the License, or
18 * (at your option) any later version.
19 *
20 * This program is distributed in the hope that it will be useful,
21 * but WITHOUT ANY WARRANTY; without even the implied warranty of
22 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
23 * GNU General Public License for more details.
24 *
25 * You should have received a copy of the GNU General Public License
26 * along with this program; if not, write to the Free Software
27 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
28 *
29 */
30
31#include <common.h>
wdenk5f535fe2003-09-18 09:21:33 +000032#include <watchdog.h>
wdenkc6097192002-11-03 00:24:07 +000033#include <asm/arch/pxa-regs.h>
34
Wolfgang Denkd87080b2006-03-31 18:32:53 +020035DECLARE_GLOBAL_DATA_PTR;
36
wdenkc6097192002-11-03 00:24:07 +000037void serial_setbrg (void)
38{
wdenkc6097192002-11-03 00:24:07 +000039 unsigned int quot = 0;
40
41 if (gd->baudrate == 1200)
wdenk5f535fe2003-09-18 09:21:33 +000042 quot = 768;
wdenkc6097192002-11-03 00:24:07 +000043 else if (gd->baudrate == 9600)
44 quot = 96;
45 else if (gd->baudrate == 19200)
46 quot = 48;
47 else if (gd->baudrate == 38400)
48 quot = 24;
49 else if (gd->baudrate == 57600)
50 quot = 16;
51 else if (gd->baudrate == 115200)
52 quot = 8;
53 else
54 hang ();
55
56#ifdef CONFIG_FFUART
Markus Klotzbüchere0269572006-02-07 20:04:48 +010057#ifdef CONFIG_CPU_MONAHANS
58 CKENA |= CKENA_22_FFUART;
59#else
wdenkc6097192002-11-03 00:24:07 +000060 CKEN |= CKEN6_FFUART;
Markus Klotzbüchere0269572006-02-07 20:04:48 +010061#endif /* CONFIG_CPU_MONAHANS */
wdenkc6097192002-11-03 00:24:07 +000062
63 FFIER = 0; /* Disable for now */
64 FFFCR = 0; /* No fifos enabled */
65
66 /* set baud rate */
67 FFLCR = LCR_WLS0 | LCR_WLS1 | LCR_DLAB;
68 FFDLL = quot & 0xff;
69 FFDLH = quot >> 8;
70 FFLCR = LCR_WLS0 | LCR_WLS1;
71
72 FFIER = IER_UUE; /* Enable FFUART */
73
wdenk3e386912003-04-05 00:53:31 +000074#elif defined(CONFIG_BTUART)
Markus Klotzbüchere0269572006-02-07 20:04:48 +010075#ifdef CONFIG_CPU_MONAHANS
76 CKENA |= CKENA_21_BTUART;
77#else
wdenk3e386912003-04-05 00:53:31 +000078 CKEN |= CKEN7_BTUART;
Markus Klotzbüchere0269572006-02-07 20:04:48 +010079#endif /* CONFIG_CPU_MONAHANS */
wdenk3e386912003-04-05 00:53:31 +000080
81 BTIER = 0;
82 BTFCR = 0;
83
84 /* set baud rate */
85 BTLCR = LCR_DLAB;
86 BTDLL = quot & 0xff;
87 BTDLH = quot >> 8;
88 BTLCR = LCR_WLS0 | LCR_WLS1;
89
90 BTIER = IER_UUE; /* Enable BFUART */
91
92#elif defined(CONFIG_STUART)
Markus Klotzbüchere0269572006-02-07 20:04:48 +010093#ifdef CONFIG_CPU_MONAHANS
94 CKENA |= CKENA_23_STUART;
95#else
wdenk5f535fe2003-09-18 09:21:33 +000096 CKEN |= CKEN5_STUART;
Markus Klotzbüchere0269572006-02-07 20:04:48 +010097#endif /* CONFIG_CPU_MONAHANS */
wdenk5f535fe2003-09-18 09:21:33 +000098
99 STIER = 0;
100 STFCR = 0;
101
102 /* set baud rate */
103 STLCR = LCR_DLAB;
104 STDLL = quot & 0xff;
105 STDLH = quot >> 8;
106 STLCR = LCR_WLS0 | LCR_WLS1;
107
108 STIER = IER_UUE; /* Enable STUART */
109
wdenkc6097192002-11-03 00:24:07 +0000110#else
wdenk5f535fe2003-09-18 09:21:33 +0000111#error "Bad: you didn't configure serial ..."
wdenkc6097192002-11-03 00:24:07 +0000112#endif
113}
114
115
116/*
117 * Initialise the serial port with the given baudrate. The settings
118 * are always 8 data bits, no parity, 1 stop bit, no start bits.
119 *
120 */
121int serial_init (void)
122{
123 serial_setbrg ();
124
125 return (0);
126}
127
128
129/*
130 * Output a single byte to the serial port.
131 */
132void serial_putc (const char c)
133{
134#ifdef CONFIG_FFUART
135 /* wait for room in the tx FIFO on FFUART */
wdenk5f535fe2003-09-18 09:21:33 +0000136 while ((FFLSR & LSR_TEMT) == 0)
137 WATCHDOG_RESET (); /* Reset HW Watchdog, if needed */
wdenkc6097192002-11-03 00:24:07 +0000138 FFTHR = c;
wdenk3e386912003-04-05 00:53:31 +0000139#elif defined(CONFIG_BTUART)
wdenk5f535fe2003-09-18 09:21:33 +0000140 while ((BTLSR & LSR_TEMT ) == 0 )
141 WATCHDOG_RESET (); /* Reset HW Watchdog, if needed */
wdenk3e386912003-04-05 00:53:31 +0000142 BTTHR = c;
143#elif defined(CONFIG_STUART)
wdenk5f535fe2003-09-18 09:21:33 +0000144 while ((STLSR & LSR_TEMT ) == 0 )
145 WATCHDOG_RESET (); /* Reset HW Watchdog, if needed */
146 STTHR = c;
wdenkc6097192002-11-03 00:24:07 +0000147#endif
148
149 /* If \n, also do \r */
150 if (c == '\n')
151 serial_putc ('\r');
152}
153
154/*
155 * Read a single byte from the serial port. Returns 1 on success, 0
156 * otherwise. When the function is succesfull, the character read is
157 * written into its argument c.
158 */
159int serial_tstc (void)
160{
161#ifdef CONFIG_FFUART
162 return FFLSR & LSR_DR;
wdenk3e386912003-04-05 00:53:31 +0000163#elif defined(CONFIG_BTUART)
164 return BTLSR & LSR_DR;
165#elif defined(CONFIG_STUART)
wdenk5f535fe2003-09-18 09:21:33 +0000166 return STLSR & LSR_DR;
wdenkc6097192002-11-03 00:24:07 +0000167#endif
168}
169
170/*
171 * Read a single byte from the serial port. Returns 1 on success, 0
172 * otherwise. When the function is succesfull, the character read is
173 * written into its argument c.
174 */
175int serial_getc (void)
176{
177#ifdef CONFIG_FFUART
wdenk5f535fe2003-09-18 09:21:33 +0000178 while (!(FFLSR & LSR_DR))
179 WATCHDOG_RESET (); /* Reset HW Watchdog, if needed */
wdenkc6097192002-11-03 00:24:07 +0000180 return (char) FFRBR & 0xff;
wdenk3e386912003-04-05 00:53:31 +0000181#elif defined(CONFIG_BTUART)
wdenk5f535fe2003-09-18 09:21:33 +0000182 while (!(BTLSR & LSR_DR))
183 WATCHDOG_RESET (); /* Reset HW Watchdog, if needed */
wdenk3e386912003-04-05 00:53:31 +0000184 return (char) BTRBR & 0xff;
185#elif defined(CONFIG_STUART)
wdenk5f535fe2003-09-18 09:21:33 +0000186 while (!(STLSR & LSR_DR))
187 WATCHDOG_RESET (); /* Reset HW Watchdog, if needed */
188 return (char) STRBR & 0xff;
wdenkc6097192002-11-03 00:24:07 +0000189#endif
190}
191
192void
193serial_puts (const char *s)
194{
195 while (*s) {
196 serial_putc (*s++);
197 }
198}