Tom Rini | 83d290c | 2018-05-06 17:58:06 -0400 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0+ */ |
Eric Nelson | d67b0d9 | 2013-03-11 08:44:53 +0000 | [diff] [blame] | 2 | /* |
| 3 | * Copyright (C) 2010-2011 Freescale Semiconductor, Inc. |
| 4 | * |
| 5 | * Configuration settings for the Boundary Devices Nitrogen6X |
| 6 | * and Freescale i.MX6Q Sabre Lite boards. |
Eric Nelson | d67b0d9 | 2013-03-11 08:44:53 +0000 | [diff] [blame] | 7 | */ |
| 8 | |
| 9 | #ifndef __CONFIG_H |
| 10 | #define __CONFIG_H |
| 11 | |
Eric Nelson | 02824dc | 2013-11-26 17:40:30 -0700 | [diff] [blame] | 12 | #include "mx6_common.h" |
Eric Nelson | d67b0d9 | 2013-03-11 08:44:53 +0000 | [diff] [blame] | 13 | |
| 14 | #define CONFIG_MACH_TYPE 3769 |
| 15 | |
Eric Nelson | d67b0d9 | 2013-03-11 08:44:53 +0000 | [diff] [blame] | 16 | /* Size of malloc() pool */ |
| 17 | #define CONFIG_SYS_MALLOC_LEN (10 * 1024 * 1024) |
| 18 | |
Troy Kisky | f3d7cff | 2013-09-25 18:41:18 -0700 | [diff] [blame] | 19 | #define CONFIG_USBD_HS |
Troy Kisky | f3d7cff | 2013-09-25 18:41:18 -0700 | [diff] [blame] | 20 | #define CONFIG_NETCONSOLE |
Eric Nelson | d67b0d9 | 2013-03-11 08:44:53 +0000 | [diff] [blame] | 21 | |
Eric Nelson | d67b0d9 | 2013-03-11 08:44:53 +0000 | [diff] [blame] | 22 | #define CONFIG_MXC_UART_BASE UART2_BASE |
| 23 | |
Eric Nelson | d67b0d9 | 2013-03-11 08:44:53 +0000 | [diff] [blame] | 24 | /* I2C Configs */ |
trem | b089d03 | 2013-09-21 18:13:36 +0200 | [diff] [blame] | 25 | #define CONFIG_SYS_I2C |
| 26 | #define CONFIG_SYS_I2C_MXC |
Albert ARIBAUD \\(3ADEV\\) | 03544c6 | 2015-09-21 22:43:38 +0200 | [diff] [blame] | 27 | #define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */ |
| 28 | #define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */ |
York Sun | f8cb101 | 2015-03-20 10:20:40 -0700 | [diff] [blame] | 29 | #define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */ |
Eric Nelson | d67b0d9 | 2013-03-11 08:44:53 +0000 | [diff] [blame] | 30 | #define CONFIG_SYS_I2C_SPEED 100000 |
Eric Nelson | 5dbdc3c | 2014-10-02 12:16:47 -0700 | [diff] [blame] | 31 | #define CONFIG_I2C_EDID |
Eric Nelson | d67b0d9 | 2013-03-11 08:44:53 +0000 | [diff] [blame] | 32 | |
Eric Nelson | d67b0d9 | 2013-03-11 08:44:53 +0000 | [diff] [blame] | 33 | /* MMC Configs */ |
Eric Nelson | d67b0d9 | 2013-03-11 08:44:53 +0000 | [diff] [blame] | 34 | #define CONFIG_SYS_FSL_ESDHC_ADDR 0 |
| 35 | #define CONFIG_SYS_FSL_USDHC_NUM 2 |
| 36 | |
Eric Nelson | d67b0d9 | 2013-03-11 08:44:53 +0000 | [diff] [blame] | 37 | /* |
| 38 | * SATA Configs |
| 39 | */ |
| 40 | #ifdef CONFIG_CMD_SATA |
Eric Nelson | d67b0d9 | 2013-03-11 08:44:53 +0000 | [diff] [blame] | 41 | #define CONFIG_SYS_SATA_MAX_DEVICE 1 |
| 42 | #define CONFIG_DWC_AHSATA_PORT_ID 0 |
| 43 | #define CONFIG_DWC_AHSATA_BASE_ADDR SATA_ARB_BASE_ADDR |
| 44 | #define CONFIG_LBA48 |
Eric Nelson | d67b0d9 | 2013-03-11 08:44:53 +0000 | [diff] [blame] | 45 | #endif |
| 46 | |
Eric Nelson | d67b0d9 | 2013-03-11 08:44:53 +0000 | [diff] [blame] | 47 | #define CONFIG_FEC_MXC |
Eric Nelson | d67b0d9 | 2013-03-11 08:44:53 +0000 | [diff] [blame] | 48 | #define IMX_FEC_BASE ENET_BASE_ADDR |
| 49 | #define CONFIG_FEC_XCV_TYPE RGMII |
| 50 | #define CONFIG_ETHPRIME "FEC" |
| 51 | #define CONFIG_FEC_MXC_PHYADDR 6 |
Eric Nelson | d67b0d9 | 2013-03-11 08:44:53 +0000 | [diff] [blame] | 52 | |
| 53 | /* USB Configs */ |
Troy Kisky | d1a5286 | 2013-10-10 15:27:59 -0700 | [diff] [blame] | 54 | #define CONFIG_USB_MAX_CONTROLLER_COUNT 2 |
| 55 | #define CONFIG_EHCI_HCD_INIT_AFTER_RESET /* For OTG port */ |
Eric Nelson | d67b0d9 | 2013-03-11 08:44:53 +0000 | [diff] [blame] | 56 | #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) |
| 57 | #define CONFIG_MXC_USB_FLAGS 0 |
| 58 | |
Eric Nelson | d67b0d9 | 2013-03-11 08:44:53 +0000 | [diff] [blame] | 59 | /* Framebuffer and LCD */ |
Eric Nelson | d67b0d9 | 2013-03-11 08:44:53 +0000 | [diff] [blame] | 60 | #define CONFIG_VIDEO_BMP_RLE8 |
| 61 | #define CONFIG_SPLASH_SCREEN |
Eric Nelson | 761bc19 | 2015-04-16 11:31:33 -0700 | [diff] [blame] | 62 | #define CONFIG_SPLASH_SCREEN_ALIGN |
| 63 | #define CONFIG_VIDEO_BMP_GZIP |
| 64 | #define CONFIG_SYS_VIDEO_LOGO_MAX_SIZE (6 * 1024 * 1024) |
Eric Nelson | d67b0d9 | 2013-03-11 08:44:53 +0000 | [diff] [blame] | 65 | #define CONFIG_BMP_16BPP |
Pardeep Kumar Singla | 5ea7f0e | 2013-07-25 12:12:13 -0500 | [diff] [blame] | 66 | #define CONFIG_IMX_HDMI |
Eric Benard | a47e449 | 2014-04-04 19:05:53 +0200 | [diff] [blame] | 67 | #define CONFIG_IMX_VIDEO_SKIP |
Eric Nelson | d67b0d9 | 2013-03-11 08:44:53 +0000 | [diff] [blame] | 68 | |
Guillaume GARDET | cc5d7dc | 2018-04-18 17:04:58 +0200 | [diff] [blame] | 69 | #ifdef CONFIG_CMD_MMC |
| 70 | #define DISTRO_BOOT_DEV_MMC(func) func(MMC, mmc, 0) func(MMC, mmc, 1) |
Eric Nelson | d67b0d9 | 2013-03-11 08:44:53 +0000 | [diff] [blame] | 71 | #else |
Guillaume GARDET | cc5d7dc | 2018-04-18 17:04:58 +0200 | [diff] [blame] | 72 | #define DISTRO_BOOT_DEV_MMC(func) |
Eric Nelson | d67b0d9 | 2013-03-11 08:44:53 +0000 | [diff] [blame] | 73 | #endif |
| 74 | |
Guillaume GARDET | cc5d7dc | 2018-04-18 17:04:58 +0200 | [diff] [blame] | 75 | #ifdef CONFIG_CMD_SATA |
| 76 | #define DISTRO_BOOT_DEV_SATA(func) func(SATA, sata, 0) |
Eric Nelson | d67b0d9 | 2013-03-11 08:44:53 +0000 | [diff] [blame] | 77 | #else |
Guillaume GARDET | cc5d7dc | 2018-04-18 17:04:58 +0200 | [diff] [blame] | 78 | #define DISTRO_BOOT_DEV_SATA(func) |
Eric Nelson | d67b0d9 | 2013-03-11 08:44:53 +0000 | [diff] [blame] | 79 | #endif |
| 80 | |
Diego Rondini | 5b7103e | 2014-10-02 12:16:41 -0700 | [diff] [blame] | 81 | #ifdef CONFIG_USB_STORAGE |
Guillaume GARDET | cc5d7dc | 2018-04-18 17:04:58 +0200 | [diff] [blame] | 82 | #define DISTRO_BOOT_DEV_USB(func) func(USB, usb, 0) |
Diego Rondini | 5b7103e | 2014-10-02 12:16:41 -0700 | [diff] [blame] | 83 | #else |
Guillaume GARDET | cc5d7dc | 2018-04-18 17:04:58 +0200 | [diff] [blame] | 84 | #define DISTRO_BOOT_DEV_USB(func) |
Diego Rondini | 5b7103e | 2014-10-02 12:16:41 -0700 | [diff] [blame] | 85 | #endif |
| 86 | |
Guillaume GARDET | cc5d7dc | 2018-04-18 17:04:58 +0200 | [diff] [blame] | 87 | #ifdef CONFIG_CMD_PXE |
| 88 | #define DISTRO_BOOT_DEV_PXE(func) func(PXE, pxe, na) |
| 89 | #else |
| 90 | #define DISTRO_BOOT_DEV_PXE(func) |
| 91 | #endif |
| 92 | |
| 93 | #ifdef CONFIG_CMD_DHCP |
| 94 | #define DISTRO_BOOT_DEV_DHCP(func) func(DHCP, dhcp, na) |
| 95 | #else |
| 96 | #define DISTRO_BOOT_DEV_DHCP(func) |
| 97 | #endif |
| 98 | |
Eric Nelson | d67b0d9 | 2013-03-11 08:44:53 +0000 | [diff] [blame] | 99 | |
Fabio Estevam | f8b1e86 | 2013-07-26 11:37:17 -0300 | [diff] [blame] | 100 | #if defined(CONFIG_SABRELITE) |
Guillaume GARDET | cc5d7dc | 2018-04-18 17:04:58 +0200 | [diff] [blame] | 101 | #define FDTFILE "fdtfile=imx6q-sabrelite.dtb\0" |
| 102 | #else |
| 103 | /* FIXME: nitrogen6x covers multiple configs. Define fdtfile for each supported config. */ |
| 104 | #define FDTFILE |
| 105 | #endif |
| 106 | |
| 107 | #define BOOT_TARGET_DEVICES(func) \ |
| 108 | DISTRO_BOOT_DEV_MMC(func) \ |
| 109 | DISTRO_BOOT_DEV_SATA(func) \ |
| 110 | DISTRO_BOOT_DEV_USB(func) \ |
| 111 | DISTRO_BOOT_DEV_PXE(func) \ |
| 112 | DISTRO_BOOT_DEV_DHCP(func) |
| 113 | |
| 114 | #include <config_distro_bootcmd.h> |
Simon Glass | 1af3c7f | 2020-05-10 11:40:09 -0600 | [diff] [blame] | 115 | #include <linux/stringify.h> |
Guillaume GARDET | cc5d7dc | 2018-04-18 17:04:58 +0200 | [diff] [blame] | 116 | |
Fabio Estevam | f8b1e86 | 2013-07-26 11:37:17 -0300 | [diff] [blame] | 117 | #define CONFIG_EXTRA_ENV_SETTINGS \ |
Fabio Estevam | f8b1e86 | 2013-07-26 11:37:17 -0300 | [diff] [blame] | 118 | "console=ttymxc1\0" \ |
| 119 | "fdt_high=0xffffffff\0" \ |
| 120 | "initrd_high=0xffffffff\0" \ |
Guillaume GARDET | cc5d7dc | 2018-04-18 17:04:58 +0200 | [diff] [blame] | 121 | "fdt_addr_r=0x18000000\0" \ |
| 122 | FDTFILE \ |
| 123 | "kernel_addr_r=" __stringify(CONFIG_LOADADDR) "\0" \ |
| 124 | "pxefile_addr_r=" __stringify(CONFIG_LOADADDR) "\0" \ |
| 125 | "scriptaddr=" __stringify(CONFIG_LOADADDR) "\0" \ |
| 126 | "ramdisk_addr_r=0x13000000\0" \ |
| 127 | "ramdiskaddr=0x13000000\0" \ |
Fabio Estevam | f8b1e86 | 2013-07-26 11:37:17 -0300 | [diff] [blame] | 128 | "ip_dyn=yes\0" \ |
Gary Bisson | 1c3e62d | 2017-01-12 12:18:44 +0100 | [diff] [blame] | 129 | "usb_pgood_delay=2000\0" \ |
Guillaume GARDET | cc5d7dc | 2018-04-18 17:04:58 +0200 | [diff] [blame] | 130 | BOOTENV |
Fabio Estevam | f8b1e86 | 2013-07-26 11:37:17 -0300 | [diff] [blame] | 131 | |
Eric Nelson | d67b0d9 | 2013-03-11 08:44:53 +0000 | [diff] [blame] | 132 | /* Miscellaneous configurable options */ |
Eric Nelson | d67b0d9 | 2013-03-11 08:44:53 +0000 | [diff] [blame] | 133 | |
Eric Nelson | d67b0d9 | 2013-03-11 08:44:53 +0000 | [diff] [blame] | 134 | /* Physical Memory Map */ |
Eric Nelson | d67b0d9 | 2013-03-11 08:44:53 +0000 | [diff] [blame] | 135 | #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR |
| 136 | |
| 137 | #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM |
| 138 | #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR |
| 139 | #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE |
| 140 | |
| 141 | #define CONFIG_SYS_INIT_SP_OFFSET \ |
| 142 | (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) |
| 143 | #define CONFIG_SYS_INIT_SP_ADDR \ |
| 144 | (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) |
| 145 | |
Peter Robinson | 056845c | 2015-05-22 17:30:45 +0100 | [diff] [blame] | 146 | /* Environment organization */ |
Eric Nelson | d67b0d9 | 2013-03-11 08:44:53 +0000 | [diff] [blame] | 147 | |
Marek Vasut | 147f8fa | 2013-12-14 05:55:29 +0100 | [diff] [blame] | 148 | /* |
| 149 | * PCI express |
| 150 | */ |
Marek Vasut | 147f8fa | 2013-12-14 05:55:29 +0100 | [diff] [blame] | 151 | #ifdef CONFIG_CMD_PCI |
Marek Vasut | 147f8fa | 2013-12-14 05:55:29 +0100 | [diff] [blame] | 152 | #define CONFIG_PCI_SCAN_SHOW |
| 153 | #define CONFIG_PCIE_IMX |
| 154 | #endif |
| 155 | |
Eric Nelson | d67b0d9 | 2013-03-11 08:44:53 +0000 | [diff] [blame] | 156 | #endif /* __CONFIG_H */ |