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gerrit.devboardsforandroid.linaro.org / platform / external / u-boot / 025f2b338072781cd747bf7365cf43fcf9f40f1a / . / arch / mips / cpu / xburst / start.S
blob: 9e637dfe998380d495014ebcb39ba43e5c8dcc7c [file] [log] [blame]
Xiangfu Liu80421fc2011-10-12 12:24:06 +0800[diff] [blame]1/*
2 * Startup Code for MIPS32 XBURST CPU-core
3 *
4 * Copyright (c) 2010 Xiangfu Liu <xiangfu@sharism.cc>
5 *
6 * See file CREDITS for list of people who contributed to this
7 * project.
8 *
9 * This program is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License as
11 * published by the Free Software Foundation; either version 2 of
12 * the License, or (at your option) any later version.
13 *
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
18 *
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software
21 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
22 * MA 02111-1307 USA
23 */
24
25#include <config.h>
26#include <version.h>
27#include <asm/regdef.h>
28#include <asm/mipsregs.h>
29#include <asm/addrspace.h>
30#include <asm/cacheops.h>
31
32 .set noreorder
33
34 .globl _start
35 .text
36_start:
37 /* Initialize $gp */
38 bal 1f
39 nop
40 .word _gp
411:
42 lw gp, 0(ra)
43
44 /* Set up temporary stack */
45 li sp, CONFIG_SYS_SDRAM_BASE + CONFIG_SYS_INIT_SP_OFFSET
46
47 la t9, board_init_f
48 jr t9
49 nop
50
51/*
52 * void relocate_code (addr_sp, gd, addr_moni)
53 *
54 * This "function" does not return, instead it continues in RAM
55 * after relocating the monitor code.
56 *
57 * a0 = addr_sp
58 * a1 = gd
59 * a2 = destination address
60 */
61 .globl relocate_code
62 .ent relocate_code
63relocate_code:
64 move sp, a0 # set new stack pointer
65
66 li t0, CONFIG_SYS_MONITOR_BASE
67 la t3, in_ram
68 lw t2, -12(t3) # t2 <-- uboot_end_data
69 move t1, a2
70
71 /*
72 * Fix $gp:
73 *
74 * New $gp = (Old $gp - CONFIG_SYS_MONITOR_BASE) + Destination Address
75 */
76 move t6, gp
77 sub gp, CONFIG_SYS_MONITOR_BASE
78 add gp, a2 # gp now adjusted
79 sub t6, gp, t6 # t6 <-- relocation offset
80
81 /*
82 * t0 = source address
83 * t1 = target address
84 * t2 = source end address
85 */
861:
87 lw t3, 0(t0)
88 sw t3, 0(t1)
89 addu t0, 4
Gabor Juhos5b7dd812013-01-24 06:27:51 +0000[diff] [blame]90 blt t0, t2, 1b
Xiangfu Liu80421fc2011-10-12 12:24:06 +0800[diff] [blame]91 addu t1, 4
92
93 /* If caches were enabled, we would have to flush them here. */
94
95 /* flush d-cache */
96 li t0, KSEG0
97 addi t1, t0, CONFIG_SYS_DCACHE_SIZE
982:
Zhi-zhou Zhangcb0a6a12012-10-16 15:02:08 +0200[diff] [blame]99 cache INDEX_WRITEBACK_INV_D, 0(t0)
Xiangfu Liu80421fc2011-10-12 12:24:06 +0800[diff] [blame]100 bne t0, t1, 2b
101 addi t0, CONFIG_SYS_CACHELINE_SIZE
102
103 sync
104
105 /* flush i-cache */
106 li t0, KSEG0
107 addi t1, t0, CONFIG_SYS_ICACHE_SIZE
1083:
Zhi-zhou Zhangcb0a6a12012-10-16 15:02:08 +0200[diff] [blame]109 cache INDEX_INVALIDATE_I, 0(t0)
Xiangfu Liu80421fc2011-10-12 12:24:06 +0800[diff] [blame]110 bne t0, t1, 3b
111 addi t0, CONFIG_SYS_CACHELINE_SIZE
112
113 /* Invalidate BTB */
114 mfc0 t0, CP0_CONFIG, 7
115 nop
116 ori t0, 2
117 mtc0 t0, CP0_CONFIG, 7
118 nop
119
120 /* Jump to where we've relocated ourselves */
121 addi t0, a2, in_ram - _start
122 jr t0
123 nop
124
Xiangfu Liu80421fc2011-10-12 12:24:06 +0800[diff] [blame]125 .word _GLOBAL_OFFSET_TABLE_
126 .word uboot_end_data
127 .word uboot_end
128 .word num_got_entries
129
130in_ram:
131 /*
132 * Now we want to update GOT.
133 *
134 * GOT[0] is reserved. GOT[1] is also reserved for the dynamic object
135 * generated by GNU ld. Skip these reserved entries from relocation.
136 */
137 lw t3, -4(t0) # t3 <-- num_got_entries
138 lw t4, -16(t0) # t4 <-- _GLOBAL_OFFSET_TABLE_
Gabor Juhos025f2b32013-01-30 04:56:37 +0000[diff] [blame^]139 add t4, t6 # t4 now holds relocated _G_O_T_
Xiangfu Liu80421fc2011-10-12 12:24:06 +0800[diff] [blame]140 addi t4, t4, 8 # skipping first two entries
141 li t2, 2
1421:
143 lw t1, 0(t4)
144 beqz t1, 2f
145 add t1, t6
146 sw t1, 0(t4)
1472:
148 addi t2, 1
149 blt t2, t3, 1b
150 addi t4, 4
151
152 /* Clear BSS */
153 lw t1, -12(t0) # t1 <-- uboot_end_data
154 lw t2, -8(t0) # t2 <-- uboot_end
155 add t1, t6 # adjust pointers
156 add t2, t6
157
158 sub t1, 4
1591: addi t1, 4
160 bltl t1, t2, 1b
161 sw zero, 0(t1)
162
163 move a0, a1 # a0 <-- gd
164 la t9, board_init_r
165 jr t9
166 move a1, a2
167
168 .end relocate_code