Wolfgang Denk | 72a087e | 2006-10-24 14:27:35 +0200 | [diff] [blame] | 1 | /* |
| 2 | * Copyright (C) 2006 Atmel Corporation |
| 3 | * |
| 4 | * See file CREDITS for list of people who contributed to this |
| 5 | * project. |
| 6 | * |
| 7 | * This program is free software; you can redistribute it and/or |
| 8 | * modify it under the terms of the GNU General Public License as |
| 9 | * published by the Free Software Foundation; either version 2 of |
| 10 | * the License, or (at your option) any later version. |
| 11 | * |
| 12 | * This program is distributed in the hope that it will be useful, |
| 13 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 14 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 15 | * GNU General Public License for more details. |
| 16 | * |
| 17 | * You should have received a copy of the GNU General Public License |
| 18 | * along with this program; if not, write to the Free Software |
| 19 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, |
| 20 | * MA 02111-1307 USA |
| 21 | */ |
| 22 | #include <common.h> |
| 23 | |
| 24 | #include <asm/arch/memory-map.h> |
| 25 | #include <asm/arch/platform.h> |
| 26 | |
| 27 | #include "../sm.h" |
| 28 | |
| 29 | #define ARRAY_SIZE(x) (sizeof(x) / sizeof((x)[0])) |
| 30 | |
| 31 | const struct clock_domain chip_clock[] = { |
| 32 | [CLOCK_CPU] = { |
| 33 | .reg = SM_PM_CPU_MASK, |
| 34 | .id = CLOCK_CPU, |
| 35 | .bridge = NO_DEVICE, |
| 36 | }, |
| 37 | [CLOCK_HSB] = { |
| 38 | .reg = SM_PM_HSB_MASK, |
| 39 | .id = CLOCK_HSB, |
| 40 | .bridge = NO_DEVICE, |
| 41 | }, |
| 42 | [CLOCK_PBA] = { |
| 43 | .reg = SM_PM_PBA_MASK, |
| 44 | .id = CLOCK_PBA, |
| 45 | .bridge = DEVICE_PBA_BRIDGE, |
| 46 | }, |
| 47 | [CLOCK_PBB] = { |
| 48 | .reg = SM_PM_PBB_MASK, |
| 49 | .id = CLOCK_PBB, |
| 50 | .bridge = DEVICE_PBB_BRIDGE, |
| 51 | }, |
| 52 | }; |
| 53 | |
| 54 | static const struct resource hebi_resource[] = { |
| 55 | { |
| 56 | .type = RESOURCE_CLOCK, |
| 57 | .u = { |
| 58 | .clock = { CLOCK_HSB, 0 }, |
| 59 | }, |
| 60 | }, { |
| 61 | .type = RESOURCE_CLOCK, |
| 62 | .u = { |
| 63 | .clock = { CLOCK_PBB, 13 }, |
| 64 | }, |
| 65 | }, { |
| 66 | .type = RESOURCE_CLOCK, |
| 67 | .u = { |
| 68 | .clock = { CLOCK_PBB, 14 }, |
| 69 | }, |
| 70 | }, { |
| 71 | .type = RESOURCE_GPIO, |
| 72 | .u = { |
| 73 | .gpio = { 27, DEVICE_PIOE, GPIO_FUNC_A, 0 }, |
| 74 | }, |
| 75 | }, |
| 76 | }; |
| 77 | static const struct resource pba_bridge_resource[] = { |
| 78 | { |
| 79 | .type = RESOURCE_CLOCK, |
| 80 | .u = { |
| 81 | .clock = { CLOCK_HSB, 1 }, |
| 82 | } |
| 83 | }, { |
| 84 | .type = RESOURCE_CLOCK, |
| 85 | .u = { |
| 86 | /* HSB-HSB Bridge */ |
| 87 | .clock = { CLOCK_HSB, 4 }, |
| 88 | }, |
| 89 | }, |
| 90 | }; |
| 91 | static const struct resource pbb_bridge_resource[] = { |
| 92 | { |
| 93 | .type = RESOURCE_CLOCK, |
| 94 | .u = { |
| 95 | .clock = { CLOCK_HSB, 2 }, |
| 96 | }, |
| 97 | }, |
| 98 | }; |
| 99 | static const struct resource hramc_resource[] = { |
| 100 | { |
| 101 | .type = RESOURCE_CLOCK, |
| 102 | .u = { |
| 103 | .clock = { CLOCK_HSB, 3 }, |
| 104 | }, |
| 105 | }, |
| 106 | }; |
| 107 | static const struct resource pioa_resource[] = { |
| 108 | { |
| 109 | .type = RESOURCE_CLOCK, |
| 110 | .u = { |
| 111 | .clock = { CLOCK_PBA, 10 }, |
| 112 | }, |
| 113 | }, |
| 114 | }; |
| 115 | static const struct resource piob_resource[] = { |
| 116 | { |
| 117 | .type = RESOURCE_CLOCK, |
| 118 | .u = { |
| 119 | .clock = { CLOCK_PBA, 11 }, |
| 120 | }, |
| 121 | }, |
| 122 | }; |
| 123 | static const struct resource pioc_resource[] = { |
| 124 | { |
| 125 | .type = RESOURCE_CLOCK, |
| 126 | .u = { |
| 127 | .clock = { CLOCK_PBA, 12 }, |
| 128 | }, |
| 129 | }, |
| 130 | }; |
| 131 | static const struct resource piod_resource[] = { |
| 132 | { |
| 133 | .type = RESOURCE_CLOCK, |
| 134 | .u = { |
| 135 | .clock = { CLOCK_PBA, 13 }, |
| 136 | }, |
| 137 | }, |
| 138 | }; |
| 139 | static const struct resource pioe_resource[] = { |
| 140 | { |
| 141 | .type = RESOURCE_CLOCK, |
| 142 | .u = { |
| 143 | .clock = { CLOCK_PBA, 14 }, |
| 144 | }, |
| 145 | }, |
| 146 | }; |
| 147 | static const struct resource sm_resource[] = { |
| 148 | { |
| 149 | .type = RESOURCE_CLOCK, |
| 150 | .u = { |
| 151 | .clock = { CLOCK_PBB, 0 }, |
| 152 | }, |
| 153 | }, |
| 154 | }; |
| 155 | static const struct resource intc_resource[] = { |
| 156 | { |
| 157 | .type = RESOURCE_CLOCK, |
| 158 | .u = { |
| 159 | .clock = { CLOCK_PBB, 1 }, |
| 160 | }, |
| 161 | }, |
| 162 | }; |
| 163 | static const struct resource hmatrix_resource[] = { |
| 164 | { |
| 165 | .type = RESOURCE_CLOCK, |
| 166 | .u = { |
| 167 | .clock = { CLOCK_PBB, 2 }, |
| 168 | }, |
| 169 | }, |
| 170 | }; |
| 171 | #if defined(CFG_HPDC) |
| 172 | static const struct resource hpdc_resource[] = { |
| 173 | { |
| 174 | .type = RESOURCE_CLOCK, |
| 175 | .u = { |
| 176 | .clock = { CLOCK_PBA, 16 }, |
| 177 | }, |
| 178 | }, |
| 179 | }; |
| 180 | #endif |
| 181 | #if defined(CFG_MACB0) |
| 182 | static const struct resource macb0_resource[] = { |
| 183 | { |
| 184 | .type = RESOURCE_CLOCK, |
| 185 | .u = { |
| 186 | .clock = { CLOCK_HSB, 8 }, |
| 187 | }, |
| 188 | }, { |
| 189 | .type = RESOURCE_CLOCK, |
| 190 | .u = { |
| 191 | .clock = { CLOCK_PBB, 6 }, |
| 192 | }, |
| 193 | }, { |
| 194 | .type = RESOURCE_GPIO, |
| 195 | .u = { |
| 196 | .gpio = { 19, DEVICE_PIOC, GPIO_FUNC_A, 0 }, |
| 197 | }, |
| 198 | }, |
| 199 | }; |
| 200 | #endif |
| 201 | #if defined(CFG_MACB1) |
| 202 | static const struct resource macb1_resource[] = { |
| 203 | { |
| 204 | .type = RESOURCE_CLOCK, |
| 205 | .u = { |
| 206 | .clock = { CLOCK_HSB, 9 }, |
| 207 | }, |
| 208 | }, { |
| 209 | .type = RESOURCE_CLOCK, |
| 210 | .u = { |
| 211 | .clock = { CLOCK_PBB, 7 }, |
| 212 | }, |
| 213 | }, { |
| 214 | .type = RESOURCE_GPIO, |
| 215 | .u = { |
| 216 | .gpio = { 12, DEVICE_PIOC, GPIO_FUNC_B, 19 }, |
| 217 | }, |
| 218 | }, { |
| 219 | .type = RESOURCE_GPIO, |
| 220 | .u = { |
| 221 | .gpio = { 14, DEVICE_PIOD, GPIO_FUNC_B, 2 }, |
| 222 | }, |
| 223 | }, |
| 224 | }; |
| 225 | #endif |
| 226 | #if defined(CFG_LCDC) |
| 227 | static const struct resource lcdc_resource[] = { |
| 228 | { |
| 229 | .type = RESOURCE_CLOCK, |
| 230 | .u = { |
| 231 | .clock = { CLOCK_HSB, 7 }, |
| 232 | }, |
| 233 | }, |
| 234 | }; |
| 235 | #endif |
| 236 | #if defined(CFG_USART0) |
| 237 | static const struct resource usart0_resource[] = { |
| 238 | { |
| 239 | .type = RESOURCE_CLOCK, |
| 240 | .u = { |
| 241 | .clock = { CLOCK_PBA, 3 }, |
| 242 | }, |
| 243 | }, { |
| 244 | .type = RESOURCE_GPIO, |
| 245 | .u = { |
| 246 | .gpio = { 2, DEVICE_PIOA, GPIO_FUNC_B, 8 }, |
| 247 | }, |
| 248 | }, |
| 249 | }; |
| 250 | #endif |
| 251 | #if defined(CFG_USART1) |
| 252 | static const struct resource usart1_resource[] = { |
| 253 | { |
| 254 | .type = RESOURCE_CLOCK, |
| 255 | .u = { |
| 256 | .clock = { CLOCK_PBA, 4 }, |
| 257 | }, |
| 258 | }, { |
| 259 | .type = RESOURCE_GPIO, |
| 260 | .u = { |
| 261 | .gpio = { 2, DEVICE_PIOA, GPIO_FUNC_A, 17 }, |
| 262 | }, |
| 263 | }, |
| 264 | }; |
| 265 | #endif |
| 266 | #if defined(CFG_USART2) |
| 267 | static const struct resource usart2_resource[] = { |
| 268 | { |
| 269 | .type = RESOURCE_CLOCK, |
| 270 | .u = { |
| 271 | .clock = { CLOCK_PBA, 5 }, |
| 272 | }, |
| 273 | }, { |
| 274 | .type = RESOURCE_GPIO, |
| 275 | .u = { |
| 276 | .gpio = { 2, DEVICE_PIOB, GPIO_FUNC_B, 26 }, |
| 277 | }, |
| 278 | }, |
| 279 | }; |
| 280 | #endif |
| 281 | #if defined(CFG_USART3) |
| 282 | static const struct resource usart3_resource[] = { |
| 283 | { |
| 284 | .type = RESOURCE_CLOCK, |
| 285 | .u = { |
| 286 | .clock = { CLOCK_PBA, 6 }, |
| 287 | }, |
| 288 | }, { |
| 289 | .type = RESOURCE_GPIO, |
| 290 | .u = { |
| 291 | .gpio = { 2, DEVICE_PIOB, GPIO_FUNC_B, 17 }, |
| 292 | }, |
| 293 | }, |
| 294 | }; |
| 295 | #endif |
| 296 | #if defined(CFG_MMCI) |
| 297 | static const struct resource mmci_resource[] = { |
| 298 | { |
| 299 | .type = RESOURCE_CLOCK, |
| 300 | .u = { |
| 301 | .clock = { CLOCK_PBB, 9 }, |
| 302 | }, |
| 303 | }, { |
| 304 | .type = RESOURCE_GPIO, |
| 305 | .u = { |
| 306 | .gpio = { 6, DEVICE_PIOA, GPIO_FUNC_A, 10 }, |
| 307 | }, |
| 308 | }, |
| 309 | }; |
| 310 | #endif |
| 311 | #if defined(CFG_DMAC) |
| 312 | static const struct resource dmac_resource[] = { |
| 313 | { |
| 314 | .type = RESOURCE_CLOCK, |
| 315 | .u = { |
| 316 | .clock = { CLOCK_HSB, 10 }, |
| 317 | }, |
| 318 | }, |
| 319 | }; |
| 320 | #endif |
| 321 | |
| 322 | const struct device chip_device[] = { |
| 323 | [DEVICE_HEBI] = { |
| 324 | .regs = (void *)HSMC_BASE, |
| 325 | .nr_resources = ARRAY_SIZE(hebi_resource), |
| 326 | .resource = hebi_resource, |
| 327 | }, |
| 328 | [DEVICE_PBA_BRIDGE] = { |
| 329 | .nr_resources = ARRAY_SIZE(pba_bridge_resource), |
| 330 | .resource = pba_bridge_resource, |
| 331 | }, |
| 332 | [DEVICE_PBB_BRIDGE] = { |
| 333 | .nr_resources = ARRAY_SIZE(pbb_bridge_resource), |
| 334 | .resource = pbb_bridge_resource, |
| 335 | }, |
| 336 | [DEVICE_HRAMC] = { |
| 337 | .nr_resources = ARRAY_SIZE(hramc_resource), |
| 338 | .resource = hramc_resource, |
| 339 | }, |
| 340 | [DEVICE_PIOA] = { |
| 341 | .regs = (void *)PIOA_BASE, |
| 342 | .nr_resources = ARRAY_SIZE(pioa_resource), |
| 343 | .resource = pioa_resource, |
| 344 | }, |
| 345 | [DEVICE_PIOB] = { |
| 346 | .regs = (void *)PIOB_BASE, |
| 347 | .nr_resources = ARRAY_SIZE(piob_resource), |
| 348 | .resource = piob_resource, |
| 349 | }, |
| 350 | [DEVICE_PIOC] = { |
| 351 | .regs = (void *)PIOC_BASE, |
| 352 | .nr_resources = ARRAY_SIZE(pioc_resource), |
| 353 | .resource = pioc_resource, |
| 354 | }, |
| 355 | [DEVICE_PIOD] = { |
| 356 | .regs = (void *)PIOD_BASE, |
| 357 | .nr_resources = ARRAY_SIZE(piod_resource), |
| 358 | .resource = piod_resource, |
| 359 | }, |
| 360 | [DEVICE_PIOE] = { |
| 361 | .regs = (void *)PIOE_BASE, |
| 362 | .nr_resources = ARRAY_SIZE(pioe_resource), |
| 363 | .resource = pioe_resource, |
| 364 | }, |
| 365 | [DEVICE_SM] = { |
| 366 | .regs = (void *)SM_BASE, |
| 367 | .nr_resources = ARRAY_SIZE(sm_resource), |
| 368 | .resource = sm_resource, |
| 369 | }, |
| 370 | [DEVICE_INTC] = { |
| 371 | .regs = (void *)INTC_BASE, |
| 372 | .nr_resources = ARRAY_SIZE(intc_resource), |
| 373 | .resource = intc_resource, |
| 374 | }, |
| 375 | [DEVICE_HMATRIX] = { |
| 376 | .regs = (void *)HMATRIX_BASE, |
| 377 | .nr_resources = ARRAY_SIZE(hmatrix_resource), |
| 378 | .resource = hmatrix_resource, |
| 379 | }, |
| 380 | #if defined(CFG_HPDC) |
| 381 | [DEVICE_HPDC] = { |
| 382 | .nr_resources = ARRAY_SIZE(hpdc_resource), |
| 383 | .resource = hpdc_resource, |
| 384 | }, |
| 385 | #endif |
| 386 | #if defined(CFG_MACB0) |
| 387 | [DEVICE_MACB0] = { |
| 388 | .regs = (void *)MACB0_BASE, |
| 389 | .nr_resources = ARRAY_SIZE(macb0_resource), |
| 390 | .resource = macb0_resource, |
| 391 | }, |
| 392 | #endif |
| 393 | #if defined(CFG_MACB1) |
| 394 | [DEVICE_MACB1] = { |
| 395 | .regs = (void *)MACB1_BASE, |
| 396 | .nr_resources = ARRAY_SIZE(macb1_resource), |
| 397 | .resource = macb1_resource, |
| 398 | }, |
| 399 | #endif |
| 400 | #if defined(CFG_LCDC) |
| 401 | [DEVICE_LCDC] = { |
| 402 | .nr_resources = ARRAY_SIZE(lcdc_resource), |
| 403 | .resource = lcdc_resource, |
| 404 | }, |
| 405 | #endif |
| 406 | #if defined(CFG_USART0) |
| 407 | [DEVICE_USART0] = { |
| 408 | .regs = (void *)USART0_BASE, |
| 409 | .nr_resources = ARRAY_SIZE(usart0_resource), |
| 410 | .resource = usart0_resource, |
| 411 | }, |
| 412 | #endif |
| 413 | #if defined(CFG_USART1) |
| 414 | [DEVICE_USART1] = { |
| 415 | .regs = (void *)USART1_BASE, |
| 416 | .nr_resources = ARRAY_SIZE(usart1_resource), |
| 417 | .resource = usart1_resource, |
| 418 | }, |
| 419 | #endif |
| 420 | #if defined(CFG_USART2) |
| 421 | [DEVICE_USART2] = { |
| 422 | .regs = (void *)USART2_BASE, |
| 423 | .nr_resources = ARRAY_SIZE(usart2_resource), |
| 424 | .resource = usart2_resource, |
| 425 | }, |
| 426 | #endif |
| 427 | #if defined(CFG_USART3) |
| 428 | [DEVICE_USART3] = { |
| 429 | .regs = (void *)USART3_BASE, |
| 430 | .nr_resources = ARRAY_SIZE(usart3_resource), |
| 431 | .resource = usart3_resource, |
| 432 | }, |
| 433 | #endif |
| 434 | #if defined(CFG_MMCI) |
| 435 | [DEVICE_MMCI] = { |
| 436 | .regs = (void *)MMCI_BASE, |
| 437 | .nr_resources = ARRAY_SIZE(mmci_resource), |
| 438 | .resource = mmci_resource, |
| 439 | }, |
| 440 | #endif |
| 441 | #if defined(CFG_DMAC) |
| 442 | [DEVICE_DMAC] = { |
| 443 | .regs = (void *)DMAC_BASE, |
| 444 | .nr_resources = ARRAY_SIZE(dmac_resource), |
| 445 | .resource = dmac_resource, |
| 446 | }, |
| 447 | #endif |
| 448 | }; |