Bartlomiej Sieka | 038ccac | 2006-02-24 09:37:22 +0100 | [diff] [blame^] | 1 | /* |
| 2 | * (C) Copyright 2006 DENX Software Engineering |
| 3 | * |
| 4 | * See file CREDITS for list of people who contributed to this |
| 5 | * project. |
| 6 | * |
| 7 | * This program is free software; you can redistribute it and/or |
| 8 | * modify it under the terms of the GNU General Public License as |
| 9 | * published by the Free Software Foundation; either version 2 of |
| 10 | * the License, or (at your option) any later version. |
| 11 | * |
| 12 | * This program is distributed in the hope that it will be useful, |
| 13 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 14 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 15 | * GNU General Public License for more details. |
| 16 | * |
| 17 | * You should have received a copy of the GNU General Public License |
| 18 | * along with this program; if not, write to the Free Software |
| 19 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, |
| 20 | * MA 02111-1307 USA |
| 21 | */ |
| 22 | |
| 23 | #include <common.h> |
| 24 | |
| 25 | #if (CONFIG_COMMANDS & CFG_CMD_NAND) |
| 26 | #ifdef CONFIG_NEW_NAND_CODE |
| 27 | /* new NAND handling */ |
| 28 | |
| 29 | #include <nand.h> |
| 30 | |
| 31 | /* |
| 32 | * hardware specific access to control-lines |
| 33 | * function borrowed from Linux 2.6 (drivers/mtd/nand/ppchameleonevb.c) |
| 34 | */ |
| 35 | static void ppchameleonevb_hwcontrol(struct mtd_info *mtdinfo, int cmd) |
| 36 | { |
| 37 | struct nand_chip *this = mtdinfo->priv; |
| 38 | ulong base = (ulong) this->IO_ADDR_W; |
| 39 | |
| 40 | switch(cmd) { |
| 41 | case NAND_CTL_SETCLE: |
| 42 | MACRO_NAND_CTL_SETCLE((unsigned long)base); |
| 43 | break; |
| 44 | case NAND_CTL_CLRCLE: |
| 45 | MACRO_NAND_CTL_CLRCLE((unsigned long)base); |
| 46 | break; |
| 47 | case NAND_CTL_SETALE: |
| 48 | MACRO_NAND_CTL_SETALE((unsigned long)base); |
| 49 | break; |
| 50 | case NAND_CTL_CLRALE: |
| 51 | MACRO_NAND_CTL_CLRALE((unsigned long)base); |
| 52 | break; |
| 53 | case NAND_CTL_SETNCE: |
| 54 | MACRO_NAND_ENABLE_CE((unsigned long)base); |
| 55 | break; |
| 56 | case NAND_CTL_CLRNCE: |
| 57 | MACRO_NAND_DISABLE_CE((unsigned long)base); |
| 58 | break; |
| 59 | } |
| 60 | } |
| 61 | |
| 62 | |
| 63 | /* |
| 64 | * read device ready pin |
| 65 | * function +/- borrowed from Linux 2.6 (drivers/mtd/nand/ppchameleonevb.c) |
| 66 | */ |
| 67 | static int ppchameleonevb_device_ready(struct mtd_info *mtdinfo) |
| 68 | { |
| 69 | struct nand_chip *this = mtdinfo->priv; |
| 70 | ulong rb_gpio_pin; |
| 71 | |
| 72 | /* use the base addr to find out which chip are we dealing with */ |
| 73 | switch((ulong) this->IO_ADDR_W) { |
| 74 | case CFG_NAND0_BASE: |
| 75 | rb_gpio_pin = CFG_NAND0_RDY; |
| 76 | break; |
| 77 | case CFG_NAND1_BASE: |
| 78 | rb_gpio_pin = CFG_NAND1_RDY; |
| 79 | break; |
| 80 | default: /* this should never happen */ |
| 81 | return 0; |
| 82 | break; |
| 83 | } |
| 84 | |
| 85 | if (in32(GPIO0_IR) & rb_gpio_pin) |
| 86 | return 1; |
| 87 | return 0; |
| 88 | } |
| 89 | |
| 90 | |
| 91 | /* |
| 92 | * Board-specific NAND initialization. The following members of the |
| 93 | * argument are board-specific (per include/linux/mtd/nand_new.h): |
| 94 | * - IO_ADDR_R?: address to read the 8 I/O lines of the flash device |
| 95 | * - IO_ADDR_W?: address to write the 8 I/O lines of the flash device |
| 96 | * - hwcontrol: hardwarespecific function for accesing control-lines |
| 97 | * - dev_ready: hardwarespecific function for accesing device ready/busy line |
| 98 | * - enable_hwecc?: function to enable (reset) hardware ecc generator. Must |
| 99 | * only be provided if a hardware ECC is available |
| 100 | * - eccmode: mode of ecc, see defines |
| 101 | * - chip_delay: chip dependent delay for transfering data from array to |
| 102 | * read regs (tR) |
| 103 | * - options: various chip options. They can partly be set to inform |
| 104 | * nand_scan about special functionality. See the defines for further |
| 105 | * explanation |
| 106 | * Members with a "?" were not set in the merged testing-NAND branch, |
| 107 | * so they are not set here either. |
| 108 | */ |
| 109 | void board_nand_init(struct nand_chip *nand) |
| 110 | { |
| 111 | |
| 112 | nand->hwcontrol = ppchameleonevb_hwcontrol; |
| 113 | nand->dev_ready = ppchameleonevb_device_ready; |
| 114 | nand->eccmode = NAND_ECC_SOFT; |
| 115 | nand->chip_delay = NAND_BIG_DELAY_US; |
| 116 | nand->options = NAND_SAMSUNG_LP_OPTIONS; |
| 117 | } |
| 118 | |
| 119 | #else |
| 120 | |
| 121 | /* old NAND handling */ |
| 122 | extern ulong |
| 123 | nand_probe(ulong physadr); |
| 124 | |
| 125 | void |
| 126 | nand_init(void) |
| 127 | { |
| 128 | ulong totlen = 0; |
| 129 | |
| 130 | /* |
| 131 | The HI model is equipped with a large block NAND chip not supported yet |
| 132 | by U-Boot |
| 133 | (CONFIG_PPCHAMELEON_MODULE_MODEL == CONFIG_PPCHAMELEON_MODULE_HI) |
| 134 | */ |
| 135 | |
| 136 | #if (CONFIG_PPCHAMELEON_MODULE_MODEL == CONFIG_PPCHAMELEON_MODULE_ME) |
| 137 | debug ("Probing at 0x%.8x\n", CFG_NAND0_BASE); |
| 138 | totlen += nand_probe (CFG_NAND0_BASE); |
| 139 | #endif /* CONFIG_PPCHAMELEON_MODULE_ME, CONFIG_PPCHAMELEON_MODULE_HI */ |
| 140 | |
| 141 | debug ("Probing at 0x%.8x\n", CFG_NAND1_BASE); |
| 142 | totlen += nand_probe (CFG_NAND1_BASE); |
| 143 | |
| 144 | printf ("%3lu MB\n", totlen >>20); |
| 145 | } |
| 146 | #endif |
| 147 | #endif |