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Nobuhiro Iwamatsuc655fad2008-08-31 23:02:04 +09001/*
2 * Configuation settings for the Renesas Technology RSK 7203
3 *
4 * Copyright (C) 2008 Nobuhiro Iwamatsu
5 * Copyright (C) 2008 Renesas Solutions Corp.
6 *
7 * See file CREDITS for list of people who contributed to this
8 * project.
9 *
10 * This program is free software; you can redistribute it and/or
11 * modify it under the terms of the GNU General Public License as
12 * published by the Free Software Foundation; either version 2 of
13 * the License, or (at your option) any later version.
14 *
15 * This program is distributed in the hope that it will be useful,
16 * but WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 * GNU General Public License for more details.
19 *
20 * You should have received a copy of the GNU General Public License
21 * along with this program; if not, write to the Free Software
22 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
23 * MA 02111-1307 USA
24 */
25
26#ifndef __RSK7203_H
27#define __RSK7203_H
28
29#undef DEBUG
30#define CONFIG_SH 1
31#define CONFIG_SH2 1
32#define CONFIG_SH2A 1
33#define CONFIG_CPU_SH7203 1
34#define CONFIG_RSK7203 1
35
36#define CONFIG_CMD_FLASH
37#define CONFIG_CMD_NET
38#define CONFIG_CMD_NFS
39#define CONFIG_CMD_PING
Mike Frysingerbdab39d2009-01-28 19:08:14 -050040#define CONFIG_CMD_SAVEENV
Nobuhiro Iwamatsuc655fad2008-08-31 23:02:04 +090041#define CONFIG_CMD_SDRAM
42#define CONFIG_CMD_MEMORY
43#define CONFIG_CMD_CACHE
44
45#define CONFIG_BAUDRATE 115200
46#define CONFIG_BOOTARGS "console=ttySC0,115200"
47#define CONFIG_LOADADDR 0x0C100000 /* RSK7203_SDRAM_BASE + 1MB */
48
49#define CONFIG_VERSION_VARIABLE
50#undef CONFIG_SHOW_BOOT_PROGRESS
51
52/* MEMORY */
53#define RSK7203_SDRAM_BASE 0x0C000000
54#define RSK7203_FLASH_BASE_1 0x20000000 /* Non cache */
55#define RSK7203_FLASH_BANK_SIZE (4 * 1024 * 1024)
56
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020057#define CONFIG_SYS_LONGHELP /* undef to save memory */
58#define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */
59#define CONFIG_SYS_CBSIZE 256 /* Buffer size for input from the Console */
60#define CONFIG_SYS_PBSIZE 256 /* Buffer size for Console output */
61#define CONFIG_SYS_MAXARGS 16 /* max args accepted for monitor commands */
Nobuhiro Iwamatsuc655fad2008-08-31 23:02:04 +090062/* Buffer size for Boot Arguments passed to kernel */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020063#define CONFIG_SYS_BARGSIZE 512
Nobuhiro Iwamatsuc655fad2008-08-31 23:02:04 +090064/* List of legal baudrate settings for this board */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020065#define CONFIG_SYS_BAUDRATE_TABLE { 115200 }
Nobuhiro Iwamatsuc655fad2008-08-31 23:02:04 +090066
67/* SCIF */
Nobuhiro Iwamatsu6f3d8bb2008-08-28 14:52:23 +090068#define CONFIG_SCIF_CONSOLE 1
Nobuhiro Iwamatsuc655fad2008-08-31 23:02:04 +090069#define CONFIG_CONS_SCIF0 1
70
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020071#define CONFIG_SYS_MEMTEST_START RSK7203_SDRAM_BASE
72#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + (3 * 1024 * 1024))
Nobuhiro Iwamatsuc655fad2008-08-31 23:02:04 +090073
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020074#define CONFIG_SYS_SDRAM_BASE RSK7203_SDRAM_BASE
75#define CONFIG_SYS_SDRAM_SIZE (32 * 1024 * 1024)
Nobuhiro Iwamatsuc655fad2008-08-31 23:02:04 +090076
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020077#define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 1024 * 1024)
78#define CONFIG_SYS_MONITOR_BASE RSK7203_FLASH_BASE_1
79#define CONFIG_SYS_MONITOR_LEN (128 * 1024)
80#define CONFIG_SYS_MALLOC_LEN (256 * 1024)
81#define CONFIG_SYS_GBL_DATA_SIZE 256
82#define CONFIG_SYS_BOOTMAPSZ (8 * 1024 * 1024)
Nobuhiro Iwamatsuc655fad2008-08-31 23:02:04 +090083
84/* FLASH */
Nobuhiro Iwamatsu6f3d8bb2008-08-28 14:52:23 +090085#define CONFIG_FLASH_CFI_DRIVER
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020086#define CONFIG_SYS_FLASH_CFI
87#define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_16BIT
88#undef CONFIG_SYS_FLASH_QUIET_TEST
89#define CONFIG_SYS_FLASH_EMPTY_INFO /* print 'E' for empty sector on flinfo */
90#define CONFIG_SYS_FLASH_BASE RSK7203_FLASH_BASE_1
91#define CONFIG_SYS_FLASH_BANKS_LIST { CONFIG_SYS_FLASH_BASE }
92#define CONFIG_SYS_MAX_FLASH_SECT 64
93#define CONFIG_SYS_MAX_FLASH_BANKS 1
Nobuhiro Iwamatsuc655fad2008-08-31 23:02:04 +090094
Jean-Christophe PLAGNIOL-VILLARD5a1aceb2008-09-10 22:48:04 +020095#define CONFIG_ENV_IS_IN_FLASH
Jean-Christophe PLAGNIOL-VILLARD0e8d1582008-09-10 22:48:06 +020096#define CONFIG_ENV_SECT_SIZE (64 * 1024)
97#define CONFIG_ENV_SIZE CONFIG_ENV_SECT_SIZE
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020098#define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE + CONFIG_SYS_MONITOR_LEN)
99#define CONFIG_SYS_FLASH_ERASE_TOUT 12000
100#define CONFIG_SYS_FLASH_WRITE_TOUT 500
Nobuhiro Iwamatsuc655fad2008-08-31 23:02:04 +0900101
102/* Board Clock */
103#define CONFIG_SYS_CLK_FREQ 33333333
104#define CMT_CLK_DIVIDER 32 /* 8 (default), 32, 128 or 512 */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200105#define CONFIG_SYS_HZ (CONFIG_SYS_CLK_FREQ / CMT_CLK_DIVIDER)
Nobuhiro Iwamatsuc655fad2008-08-31 23:02:04 +0900106
Nobuhiro Iwamatsu05c7e902008-10-14 11:10:59 +0900107/* Network interface */
Ben Warren736fead2009-07-20 22:01:11 -0700108#define CONFIG_NET_MULTI
109#define CONFIG_SMC911X
110#define CONFIG_SMC911X_16_BIT
111#define CONFIG_SMC911X_BASE (0x24000000)
Nobuhiro Iwamatsu05c7e902008-10-14 11:10:59 +0900112
Nobuhiro Iwamatsuc655fad2008-08-31 23:02:04 +0900113#endif /* __RSK7203_H */