blob: 7f669ff53992b38e9daff4e65edeefbf4e33b97f [file] [log] [blame]
Sascha Hauercdace062008-03-26 20:40:49 +01001/*
2 * i2c driver for Freescale mx31
3 *
4 * (c) 2007 Pengutronix, Sascha Hauer <s.hauer@pengutronix.de>
5 *
6 * See file CREDITS for list of people who contributed to this
7 * project.
8 *
9 * This program is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License as
11 * published by the Free Software Foundation; either version 2 of
12 * the License, or (at your option) any later version.
13 *
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
18 *
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software
21 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
22 * MA 02111-1307 USA
23 */
24
25#include <common.h>
26
Michal Simeka4a549b2008-07-14 19:45:35 +020027#if defined(CONFIG_HARD_I2C)
Sascha Hauercdace062008-03-26 20:40:49 +010028
Liu Hui-R64343127cec12011-01-03 22:27:39 +000029#if defined(CONFIG_MX31)
Sascha Hauercdace062008-03-26 20:40:49 +010030#include <asm/arch/mx31.h>
31#include <asm/arch/mx31-regs.h>
Stefano Babic04220612011-01-19 22:46:26 +000032#else
33#include <asm/arch/imx-regs.h>
Liu Hui-R64343127cec12011-01-03 22:27:39 +000034#include <asm/arch/clock.h>
35#endif
Sascha Hauercdace062008-03-26 20:40:49 +010036
37#define IADR 0x00
38#define IFDR 0x04
39#define I2CR 0x08
40#define I2SR 0x0c
41#define I2DR 0x10
42
43#define I2CR_IEN (1 << 7)
44#define I2CR_IIEN (1 << 6)
45#define I2CR_MSTA (1 << 5)
46#define I2CR_MTX (1 << 4)
47#define I2CR_TX_NO_AK (1 << 3)
48#define I2CR_RSTA (1 << 2)
49
50#define I2SR_ICF (1 << 7)
51#define I2SR_IBB (1 << 5)
52#define I2SR_IIF (1 << 1)
53#define I2SR_RX_NO_AK (1 << 0)
54
Liu Hui-R64343127cec12011-01-03 22:27:39 +000055#if defined(CONFIG_SYS_I2C_MX31_PORT1)
Sascha Hauercdace062008-03-26 20:40:49 +010056#define I2C_BASE 0x43f80000
Guennadi Liakhovetskie7de18a2009-02-13 09:23:36 +010057#define I2C_CLK_OFFSET 26
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020058#elif defined (CONFIG_SYS_I2C_MX31_PORT2)
Sascha Hauercdace062008-03-26 20:40:49 +010059#define I2C_BASE 0x43f98000
Guennadi Liakhovetskie7de18a2009-02-13 09:23:36 +010060#define I2C_CLK_OFFSET 28
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020061#elif defined (CONFIG_SYS_I2C_MX31_PORT3)
Sascha Hauercdace062008-03-26 20:40:49 +010062#define I2C_BASE 0x43f84000
Guennadi Liakhovetskie7de18a2009-02-13 09:23:36 +010063#define I2C_CLK_OFFSET 30
Liu Hui-R64343127cec12011-01-03 22:27:39 +000064#elif defined(CONFIG_SYS_I2C_MX53_PORT1)
65#define I2C_BASE I2C1_BASE_ADDR
66#elif defined(CONFIG_SYS_I2C_MX53_PORT2)
67#define I2C_BASE I2C2_BASE_ADDR
Stefano Babic04220612011-01-19 22:46:26 +000068#elif defined(CONFIG_SYS_I2C_MX35_PORT1)
69#define I2C_BASE I2C_BASE_ADDR
Sascha Hauercdace062008-03-26 20:40:49 +010070#else
Stefano Babic04220612011-01-19 22:46:26 +000071#error "define CONFIG_SYS_I2C_MX<Processor>_PORTx to use the mx I2C driver"
Sascha Hauercdace062008-03-26 20:40:49 +010072#endif
73
74#ifdef DEBUG
75#define DPRINTF(args...) printf(args)
76#else
77#define DPRINTF(args...)
78#endif
79
80static u16 div[] = { 30, 32, 36, 42, 48, 52, 60, 72, 80, 88, 104, 128, 144,
81 160, 192, 240, 288, 320, 384, 480, 576, 640, 768, 960,
82 1152, 1280, 1536, 1920, 2304, 2560, 3072, 3840};
83
84void i2c_init(int speed, int unused)
85{
Liu Hui-R64343127cec12011-01-03 22:27:39 +000086 int freq;
Sascha Hauercdace062008-03-26 20:40:49 +010087 int i;
88
Liu Hui-R64343127cec12011-01-03 22:27:39 +000089#if defined(CONFIG_MX31)
90 freq = mx31_get_ipg_clk();
Guennadi Liakhovetskie7de18a2009-02-13 09:23:36 +010091 /* start the required I2C clock */
92 __REG(CCM_CGR0) = __REG(CCM_CGR0) | (3 << I2C_CLK_OFFSET);
Liu Hui-R64343127cec12011-01-03 22:27:39 +000093#else
94 freq = mxc_get_clock(MXC_IPG_PERCLK);
95#endif
Guennadi Liakhovetskie7de18a2009-02-13 09:23:36 +010096
Sascha Hauercdace062008-03-26 20:40:49 +010097 for (i = 0; i < 0x1f; i++)
98 if (freq / div[i] <= speed)
99 break;
100
101 DPRINTF("%s: speed: %d\n",__FUNCTION__, speed);
102
103 __REG16(I2C_BASE + I2CR) = 0; /* Reset module */
104 __REG16(I2C_BASE + IFDR) = i;
105 __REG16(I2C_BASE + I2CR) = I2CR_IEN;
106 __REG16(I2C_BASE + I2SR) = 0;
107}
108
109static int wait_busy(void)
110{
111 int timeout = 10000;
112
113 while (!(__REG16(I2C_BASE + I2SR) & I2SR_IIF) && --timeout)
114 udelay(1);
115 __REG16(I2C_BASE + I2SR) = 0; /* clear interrupt */
116
117 return timeout;
118}
119
120static int tx_byte(u8 byte)
121{
122 __REG16(I2C_BASE + I2DR) = byte;
123
124 if (!wait_busy() || __REG16(I2C_BASE + I2SR) & I2SR_RX_NO_AK)
125 return -1;
126 return 0;
127}
128
129static int rx_byte(void)
130{
131 if (!wait_busy())
132 return -1;
133
134 return __REG16(I2C_BASE + I2DR);
135}
136
137int i2c_probe(uchar chip)
138{
139 int ret;
140
141 __REG16(I2C_BASE + I2CR) = 0; /* Reset module */
142 __REG16(I2C_BASE + I2CR) = I2CR_IEN;
143
144 __REG16(I2C_BASE + I2CR) = I2CR_IEN | I2CR_MSTA | I2CR_MTX;
145 ret = tx_byte(chip << 1);
146 __REG16(I2C_BASE + I2CR) = I2CR_IEN | I2CR_MTX;
147
148 return ret;
149}
150
151static int i2c_addr(uchar chip, uint addr, int alen)
152{
153 __REG16(I2C_BASE + I2SR) = 0; /* clear interrupt */
154 __REG16(I2C_BASE + I2CR) = I2CR_IEN | I2CR_MSTA | I2CR_MTX;
155
156 if (tx_byte(chip << 1))
157 return -1;
158
159 while (alen--)
160 if (tx_byte((addr >> (alen * 8)) & 0xff))
161 return -1;
162 return 0;
163}
164
165int i2c_read(uchar chip, uint addr, int alen, uchar *buf, int len)
166{
167 int timeout = 10000;
168 int ret;
169
170 DPRINTF("%s chip: 0x%02x addr: 0x%04x alen: %d len: %d\n",__FUNCTION__, chip, addr, alen, len);
171
172 if (i2c_addr(chip, addr, alen)) {
173 printf("i2c_addr failed\n");
174 return -1;
175 }
176
177 __REG16(I2C_BASE + I2CR) = I2CR_IEN | I2CR_MSTA | I2CR_MTX | I2CR_RSTA;
178
179 if (tx_byte(chip << 1 | 1))
180 return -1;
181
182 __REG16(I2C_BASE + I2CR) = I2CR_IEN | I2CR_MSTA | ((len == 1) ? I2CR_TX_NO_AK : 0);
183
184 ret = __REG16(I2C_BASE + I2DR);
185
186 while (len--) {
187 if ((ret = rx_byte()) < 0)
188 return -1;
189 *buf++ = ret;
190 if (len <= 1)
191 __REG16(I2C_BASE + I2CR) = I2CR_IEN | I2CR_MSTA | I2CR_TX_NO_AK;
192 }
193
194 wait_busy();
195
196 __REG16(I2C_BASE + I2CR) = I2CR_IEN;
197
198 while (__REG16(I2C_BASE + I2SR) & I2SR_IBB && --timeout)
199 udelay(1);
200
201 return 0;
202}
203
204int i2c_write(uchar chip, uint addr, int alen, uchar *buf, int len)
205{
206 int timeout = 10000;
207 DPRINTF("%s chip: 0x%02x addr: 0x%04x alen: %d len: %d\n",__FUNCTION__, chip, addr, alen, len);
208
209 if (i2c_addr(chip, addr, alen))
210 return -1;
211
212 while (len--)
213 if (tx_byte(*buf++))
214 return -1;
215
216 __REG16(I2C_BASE + I2CR) = I2CR_IEN;
217
218 while (__REG16(I2C_BASE + I2SR) & I2SR_IBB && --timeout)
219 udelay(1);
220
221 return 0;
222}
223
224#endif /* CONFIG_HARD_I2C */