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Wolfgang Denkad5bb452007-03-06 18:08:43 +01001/*
2 * (C) Copyright 2002
3 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
4 *
5 * See file CREDITS for list of people who contributed to this
6 * project.
7 *
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License as
10 * published by the Free Software Foundation; either version 2 of
11 * the License, or (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
21 * MA 02111-1307 USA
22 */
23
24#include <common.h>
25
26/*
27 * CPU test
28 * Ternary instructions instr rA,rS,UIMM
29 *
30 * Logic instructions: ori, oris, xori, xoris
31 *
32 * The test contains a pre-built table of instructions, operands and
33 * expected results. For each table entry, the test will cyclically use
34 * different sets of operand registers and result registers.
35 */
36
Wolfgang Denkad5bb452007-03-06 18:08:43 +010037#include <post.h>
38#include "cpu_asm.h"
39
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020040#if CONFIG_POST & CONFIG_SYS_POST_CPU
Wolfgang Denkad5bb452007-03-06 18:08:43 +010041
42extern void cpu_post_exec_21 (ulong *code, ulong *cr, ulong *res, ulong op);
43extern ulong cpu_post_makecr (long v);
44
45static struct cpu_post_threei_s
46{
47 ulong cmd;
48 ulong op1;
49 ushort op2;
50 ulong res;
51} cpu_post_threei_table[] =
52{
53 {
Wolfgang Denk53677ef2008-05-20 16:00:29 +020054 OP_ORI,
Wolfgang Denkad5bb452007-03-06 18:08:43 +010055 0x80000000,
56 0xffff,
57 0x8000ffff
58 },
59 {
Wolfgang Denk53677ef2008-05-20 16:00:29 +020060 OP_ORIS,
Wolfgang Denkad5bb452007-03-06 18:08:43 +010061 0x00008000,
62 0xffff,
63 0xffff8000
64 },
65 {
Wolfgang Denk53677ef2008-05-20 16:00:29 +020066 OP_XORI,
Wolfgang Denkad5bb452007-03-06 18:08:43 +010067 0x8000ffff,
68 0xffff,
69 0x80000000
70 },
71 {
Wolfgang Denk53677ef2008-05-20 16:00:29 +020072 OP_XORIS,
Wolfgang Denkad5bb452007-03-06 18:08:43 +010073 0x00008000,
74 0xffff,
75 0xffff8000
76 },
77};
Mike Frysingerd2397812011-05-10 07:28:35 +000078static unsigned int cpu_post_threei_size = ARRAY_SIZE(cpu_post_threei_table);
Wolfgang Denkad5bb452007-03-06 18:08:43 +010079
80int cpu_post_test_threei (void)
81{
82 int ret = 0;
83 unsigned int i, reg;
84 int flag = disable_interrupts();
85
86 for (i = 0; i < cpu_post_threei_size && ret == 0; i++)
87 {
88 struct cpu_post_threei_s *test = cpu_post_threei_table + i;
89
90 for (reg = 0; reg < 32 && ret == 0; reg++)
91 {
92 unsigned int reg0 = (reg + 0) % 32;
93 unsigned int reg1 = (reg + 1) % 32;
94 unsigned int stk = reg < 16 ? 31 : 15;
Wolfgang Denk53677ef2008-05-20 16:00:29 +020095 unsigned long code[] =
Wolfgang Denkad5bb452007-03-06 18:08:43 +010096 {
97 ASM_STW(stk, 1, -4),
98 ASM_ADDI(stk, 1, -16),
99 ASM_STW(3, stk, 8),
100 ASM_STW(reg0, stk, 4),
101 ASM_STW(reg1, stk, 0),
102 ASM_LWZ(reg0, stk, 8),
103 ASM_11IX(test->cmd, reg1, reg0, test->op2),
104 ASM_STW(reg1, stk, 8),
105 ASM_LWZ(reg1, stk, 0),
106 ASM_LWZ(reg0, stk, 4),
107 ASM_LWZ(3, stk, 8),
108 ASM_ADDI(1, stk, 16),
109 ASM_LWZ(stk, 1, -4),
110 ASM_BLR,
111 };
112 ulong res;
113 ulong cr;
114
Wolfgang Denk53677ef2008-05-20 16:00:29 +0200115 cr = 0;
Wolfgang Denkad5bb452007-03-06 18:08:43 +0100116 cpu_post_exec_21 (code, & cr, & res, test->op1);
117
118 ret = res == test->res && cr == 0 ? 0 : -1;
119
120 if (ret != 0)
121 {
122 post_log ("Error at threei test %d !\n", i);
123 }
124 }
125 }
126
127 if (flag)
Wolfgang Denk53677ef2008-05-20 16:00:29 +0200128 enable_interrupts();
Wolfgang Denkad5bb452007-03-06 18:08:43 +0100129
130 return ret;
131}
132
133#endif