blob: 528187e1a68ac19983436949848da6241e06ce2d [file] [log] [blame]
Tom Rini83d290c2018-05-06 17:58:06 -04001/* SPDX-License-Identifier: GPL-2.0+ */
Simon Glassc861fbf2011-10-03 19:26:47 +00002/*
3 * Copyright (c) 2011 The Chromium OS Authors.
Simon Glassc861fbf2011-10-03 19:26:47 +00004 */
5
6#ifndef __CONFIG_H
7#define __CONFIG_H
8
Simon Glasse2ee1002013-06-11 11:14:44 -07009#ifdef FTRACE
10#define CONFIG_TRACE
Simon Glasse2ee1002013-06-11 11:14:44 -070011#define CONFIG_TRACE_BUFFER_SIZE (16 << 20)
Simon Glassb82de172019-04-08 13:20:46 -060012#define CONFIG_TRACE_EARLY_SIZE (16 << 20)
Simon Glasse2ee1002013-06-11 11:14:44 -070013#define CONFIG_TRACE_EARLY
14#define CONFIG_TRACE_EARLY_ADDR 0x00100000
Simon Glasse2ee1002013-06-11 11:14:44 -070015#endif
16
Simon Glass1c12bce2016-07-04 11:57:52 -060017#ifndef CONFIG_SPL_BUILD
Simon Glass42d3b292014-06-11 23:29:43 -060018#define CONFIG_IO_TRACE
Simon Glass1c12bce2016-07-04 11:57:52 -060019#endif
Simon Glass42d3b292014-06-11 23:29:43 -060020
Thomas Chou9961a0b2015-10-30 15:35:52 +080021#ifndef CONFIG_TIMER
Rob Herring28c860b2013-11-08 08:40:44 -060022#define CONFIG_SYS_TIMER_RATE 1000000
Thomas Chou9961a0b2015-10-30 15:35:52 +080023#endif
Rob Herring28c860b2013-11-08 08:40:44 -060024
Simon Glass7b06b662012-02-15 15:51:12 -080025#define CONFIG_LMB
26
Henrik Nordströmf4d8de42013-11-10 10:26:56 -070027#define CONFIG_HOST_MAX_DEVICES 4
Simon Glass10fc1212012-12-26 09:53:37 +000028
Simon Glassc861fbf2011-10-03 19:26:47 +000029/*
Simon Glassb53e94b2014-07-10 22:23:32 -060030 * Size of malloc() pool, before and after relocation
Simon Glassc861fbf2011-10-03 19:26:47 +000031 */
Simon Glassb53e94b2014-07-10 22:23:32 -060032#define CONFIG_MALLOC_F_ADDR 0x0010000
Simon Glass9f604422014-02-27 13:25:56 -070033#define CONFIG_SYS_MALLOC_LEN (32 << 20) /* 32MB */
Simon Glassc861fbf2011-10-03 19:26:47 +000034
Simon Glassc861fbf2011-10-03 19:26:47 +000035#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
36
Simon Glassc861fbf2011-10-03 19:26:47 +000037/* turn on command-line edit/c/auto */
Simon Glassc861fbf2011-10-03 19:26:47 +000038
Simon Glass5e749342014-09-15 06:33:20 -060039/* SPI - enable all SPI flash types for testing purposes */
Mike Frysingerca9a5012013-12-03 16:43:28 -070040
Simon Glassac395f02014-12-10 08:55:52 -070041#define CONFIG_I2C_EDID
Simon Glassac395f02014-12-10 08:55:52 -070042
Simon Glassc861fbf2011-10-03 19:26:47 +000043/* Memory things - we don't really want a memory test */
Simon Glassecdbf412013-02-24 20:29:23 +000044#define CONFIG_SYS_LOAD_ADDR 0x00000000
Simon Glass2c072c92014-02-27 13:26:25 -070045#define CONFIG_SYS_FDT_LOAD_ADDR 0x100
46
47#define CONFIG_PHYSMEM
Simon Glassc861fbf2011-10-03 19:26:47 +000048
49/* Size of our emulated memory */
Simon Glassa733b062013-04-26 02:53:43 +000050#define CONFIG_SYS_SDRAM_BASE 0
Simon Glassc861fbf2011-10-03 19:26:47 +000051#define CONFIG_SYS_SDRAM_SIZE (128 << 20)
Simon Glassa733b062013-04-26 02:53:43 +000052#define CONFIG_SYS_MONITOR_BASE 0
Simon Glassc861fbf2011-10-03 19:26:47 +000053
Simon Glassc861fbf2011-10-03 19:26:47 +000054#define CONFIG_SYS_BAUDRATE_TABLE {4800, 9600, 19200, 38400, 57600,\
55 115200}
Simon Glassc861fbf2011-10-03 19:26:47 +000056
Sjoerd Simons791a9f62015-04-13 22:54:27 +020057#define BOOT_TARGET_DEVICES(func) \
58 func(HOST, host, 1) \
59 func(HOST, host, 0)
60
Simon Glasse676f432019-05-18 11:59:48 -060061#ifdef __ASSEMBLY__
62#define BOOTENV
63#else
Sjoerd Simons791a9f62015-04-13 22:54:27 +020064#include <config_distro_bootcmd.h>
Simon Glasse676f432019-05-18 11:59:48 -060065#endif
Simon Glassc861fbf2011-10-03 19:26:47 +000066
Joe Hershberger1f5bc522015-04-08 01:41:25 -050067#define CONFIG_KEEP_SERVERADDR
68#define CONFIG_UDP_CHECKSUM
Joe Hershberger1f5bc522015-04-08 01:41:25 -050069#define CONFIG_TIMESTAMP
Joe Hershbergerf3e0c372015-03-22 17:09:22 -050070#define CONFIG_BOOTP_DNS2
Joe Hershbergerf3e0c372015-03-22 17:09:22 -050071#define CONFIG_BOOTP_SEND_HOSTNAME
72#define CONFIG_BOOTP_SERVERIP
Simon Glassc861fbf2011-10-03 19:26:47 +000073
Simon Glassad0e4632014-03-22 17:12:58 -060074#ifndef SANDBOX_NO_SDL
Simon Glass2c072c92014-02-27 13:26:25 -070075#define CONFIG_SANDBOX_SDL
Simon Glassad0e4632014-03-22 17:12:58 -060076#endif
77
78/* LCD and keyboard require SDL support */
79#ifdef CONFIG_SANDBOX_SDL
Simon Glass2c072c92014-02-27 13:26:25 -070080#define LCD_BPP LCD_COLOR16
Simon Glass01564442014-10-15 04:53:04 -060081#define CONFIG_LCD_BMP_RLE8
Simon Glass747440d2016-01-18 19:52:28 -070082#define CONFIG_VIDEO_BMP_RLE8
83#define CONFIG_SPLASH_SCREEN_ALIGN
Simon Glass2c072c92014-02-27 13:26:25 -070084
Simon Glassad0e4632014-03-22 17:12:58 -060085#define CONFIG_KEYBOARD
86
Simon Glass460a7172015-11-08 23:48:07 -070087#define SANDBOX_SERIAL_SETTINGS "stdin=serial,cros-ec-keyb,usbkbd\0" \
Simon Glassf1a12472016-01-21 19:44:51 -070088 "stdout=serial,vidconsole\0" \
89 "stderr=serial,vidconsole\0"
Simon Glassad0e4632014-03-22 17:12:58 -060090#else
Joe Hershberger3ea143a2015-03-22 17:09:13 -050091#define SANDBOX_SERIAL_SETTINGS "stdin=serial\0" \
Simon Glassf1a12472016-01-21 19:44:51 -070092 "stdout=serial,vidconsole\0" \
93 "stderr=serial,vidconsole\0"
Simon Glassad0e4632014-03-22 17:12:58 -060094#endif
Simon Glassc861fbf2011-10-03 19:26:47 +000095
Joe Hershberger3ea143a2015-03-22 17:09:13 -050096#define SANDBOX_ETH_SETTINGS "ethaddr=00:00:11:22:33:44\0" \
Michael Wallebe1a6e92020-06-02 01:47:09 +020097 "eth3addr=00:00:11:22:33:45\0" \
98 "eth5addr=00:00:11:22:33:46\0" \
99 "eth6addr=00:00:11:22:33:47\0" \
Joe Hershberger3ea143a2015-03-22 17:09:13 -0500100 "ipaddr=1.2.3.4\0"
101
Sjoerd Simons791a9f62015-04-13 22:54:27 +0200102#define MEM_LAYOUT_ENV_SETTINGS \
103 "bootm_size=0x10000000\0" \
104 "kernel_addr_r=0x1000000\0" \
105 "fdt_addr_r=0xc00000\0" \
106 "ramdisk_addr_r=0x2000000\0" \
107 "scriptaddr=0x1000\0" \
108 "pxefile_addr_r=0x2000\0"
109
110#define CONFIG_EXTRA_ENV_SETTINGS \
111 SANDBOX_SERIAL_SETTINGS \
112 SANDBOX_ETH_SETTINGS \
113 BOOTENV \
114 MEM_LAYOUT_ENV_SETTINGS
Joe Hershberger3ea143a2015-03-22 17:09:13 -0500115
Simon Glass1c12bce2016-07-04 11:57:52 -0600116#ifndef CONFIG_SPL_BUILD
Simon Glass74c6dc12016-05-01 11:36:23 -0600117#define CONFIG_SYS_IDE_MAXBUS 1
118#define CONFIG_SYS_ATA_IDE0_OFFSET 0
119#define CONFIG_SYS_IDE_MAXDEVICE 2
120#define CONFIG_SYS_ATA_BASE_ADDR 0x100
121#define CONFIG_SYS_ATA_DATA_OFFSET 0
122#define CONFIG_SYS_ATA_REG_OFFSET 1
123#define CONFIG_SYS_ATA_ALT_OFFSET 2
124#define CONFIG_SYS_ATA_STRIDE 4
Simon Glass1c12bce2016-07-04 11:57:52 -0600125#endif
Simon Glass74c6dc12016-05-01 11:36:23 -0600126
Simon Glasse8c0a252016-05-01 11:36:25 -0600127#define CONFIG_SCSI_AHCI_PLAT
128#define CONFIG_SYS_SCSI_MAX_DEVICE 2
129#define CONFIG_SYS_SCSI_MAX_SCSI_ID 8
130#define CONFIG_SYS_SCSI_MAX_LUN 4
131
Simon Glass199a1202016-05-01 11:36:27 -0600132#define CONFIG_SYS_SATA_MAX_DEVICE 2
133
Simon Glass68969772017-03-28 10:27:28 -0600134#define CONFIG_MISC_INIT_F
135
Simon Glassc861fbf2011-10-03 19:26:47 +0000136#endif