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Dirk Behme7379f452009-01-28 21:40:16 +01001/*
2 * (C) Copyright 2006-2008
3 * Texas Instruments.
4 * Richard Woodruff <r-woodruff2@ti.com>
5 * Syed Mohammed Khasim <x0khasim@ti.com>
6 * Nishanth Menon <nm@ti.com>
7 *
8 * Configuration settings for the TI OMAP3430 Zoom MDK board.
9 *
10 * See file CREDITS for list of people who contributed to this
11 * project.
12 *
13 * This program is free software; you can redistribute it and/or
14 * modify it under the terms of the GNU General Public License as
15 * published by the Free Software Foundation; either version 2 of
16 * the License, or (at your option) any later version.
17 *
18 * This program is distributed in the hope that it will be useful,
19 * but WITHOUT ANY WARRANTY; without even the implied warranty of
20 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
21 * GNU General Public License for more details.
22 *
23 * You should have received a copy of the GNU General Public License
24 * along with this program; if not, write to the Free Software
25 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
26 * MA 02111-1307 USA
27 */
28
29#ifndef __CONFIG_H
30#define __CONFIG_H
Dirk Behme7379f452009-01-28 21:40:16 +010031
32/*
33 * High Level Configuration Options
34 */
Dirk Behme7379f452009-01-28 21:40:16 +010035#define CONFIG_OMAP 1 /* in a TI OMAP core */
36#define CONFIG_OMAP34XX 1 /* which is a 34XX */
37#define CONFIG_OMAP3430 1 /* which is in a 3430 */
38#define CONFIG_OMAP3_ZOOM1 1 /* working with Zoom MDK Rev1 */
39
Vaibhav Hiremathcae377b2010-06-07 15:20:34 -040040#define CONFIG_SDRC /* The chip has SDRC controller */
41
Dirk Behme7379f452009-01-28 21:40:16 +010042#include <asm/arch/cpu.h> /* get chip and board defs */
43#include <asm/arch/omap3.h>
44
Sanjeev Premi6a6b62e2009-04-27 21:27:27 +053045/*
46 * Display CPU and Board information
47 */
48#define CONFIG_DISPLAY_CPUINFO 1
49#define CONFIG_DISPLAY_BOARDINFO 1
50
Dirk Behme7379f452009-01-28 21:40:16 +010051/* Clock Defines */
52#define V_OSCK 26000000 /* Clock output from T2 */
53#define V_SCLK (V_OSCK >> 1)
54
55#undef CONFIG_USE_IRQ /* no support for IRQs */
56#define CONFIG_MISC_INIT_R
57
58#define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */
59#define CONFIG_SETUP_MEMORY_TAGS 1
60#define CONFIG_INITRD_TAG 1
61#define CONFIG_REVISION_TAG 1
62
Grant Likely2fa8ca92011-03-28 09:59:07 +000063#define CONFIG_OF_LIBFDT 1
64
Dirk Behme7379f452009-01-28 21:40:16 +010065/*
66 * Size of malloc() pool
67 */
Sandeep Paulraj9c44ddc2009-09-09 11:50:40 -040068#define CONFIG_ENV_SIZE (128 << 10) /* 128 KiB */
Dirk Behme7379f452009-01-28 21:40:16 +010069 /* Sector */
Sandeep Paulraj9c44ddc2009-09-09 11:50:40 -040070#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (128 << 10))
Dirk Behme7379f452009-01-28 21:40:16 +010071
72/*
73 * Hardware drivers
74 */
75
76/*
77 * NS16550 Configuration
78 */
79#define V_NS16550_CLK 48000000 /* 48MHz (APLL96/2) */
80
81#define CONFIG_SYS_NS16550
82#define CONFIG_SYS_NS16550_SERIAL
83#define CONFIG_SYS_NS16550_REG_SIZE (-4)
84#define CONFIG_SYS_NS16550_CLK V_NS16550_CLK
85
86/*
87 * select serial console configuration
88 */
89#define CONFIG_CONS_INDEX 3
90#define CONFIG_SYS_NS16550_COM3 OMAP34XX_UART3
91#define CONFIG_SERIAL3 3 /* UART3 */
92
93/* allow to overwrite serial and ethaddr */
94#define CONFIG_ENV_OVERWRITE
95#define CONFIG_BAUDRATE 115200
96#define CONFIG_SYS_BAUDRATE_TABLE {4800, 9600, 19200, 38400, 57600,\
97 115200}
Tom Rinid6906cb2011-09-03 21:50:35 -040098#define CONFIG_GENERIC_MMC 1
Dirk Behme7379f452009-01-28 21:40:16 +010099#define CONFIG_MMC 1
Tom Rinid6906cb2011-09-03 21:50:35 -0400100#define CONFIG_OMAP_HSMMC 1
Dirk Behme7379f452009-01-28 21:40:16 +0100101#define CONFIG_DOS_PARTITION 1
102
Nishanth Menon30563a02009-11-07 10:51:24 -0500103/* DDR - I use Micron DDR */
104#define CONFIG_OMAP3_MICRON_DDR 1
105
Tom Rix05be5a62009-10-31 12:37:42 -0500106/* USB */
107#define CONFIG_MUSB_UDC 1
108#define CONFIG_USB_OMAP3 1
109#define CONFIG_TWL4030_USB 1
110
111/* USB device configuration */
112#define CONFIG_USB_DEVICE 1
113#define CONFIG_USB_TTY 1
114#define CONFIG_SYS_CONSOLE_IS_IN_ENV 1
115/* Change these to suit your needs */
116#define CONFIG_USBD_VENDORID 0x0451
117#define CONFIG_USBD_PRODUCTID 0x5678
118#define CONFIG_USBD_MANUFACTURER "Texas Instruments"
119#define CONFIG_USBD_PRODUCT_NAME "Zoom1"
120
Dirk Behme7379f452009-01-28 21:40:16 +0100121/* commands to include */
122#include <config_cmd_default.h>
123
124#define CONFIG_CMD_EXT2 /* EXT2 Support */
125#define CONFIG_CMD_FAT /* FAT support */
126#define CONFIG_CMD_JFFS2 /* JFFS2 Support */
127
128#define CONFIG_CMD_I2C /* I2C serial bus support */
129#define CONFIG_CMD_MMC /* MMC support */
130#define CONFIG_CMD_NAND /* NAND support */
Nishanth Menone7deec12009-02-02 18:20:12 -0600131#define CONFIG_CMD_NAND_LOCK_UNLOCK /* Enable lock/unlock support */
Dirk Behme7379f452009-01-28 21:40:16 +0100132
133#undef CONFIG_CMD_FLASH /* flinfo, erase, protect */
134#undef CONFIG_CMD_FPGA /* FPGA configuration Support */
135#undef CONFIG_CMD_IMI /* iminfo */
136#undef CONFIG_CMD_IMLS /* List all found images */
137#undef CONFIG_CMD_NET /* bootp, tftpboot, rarpboot */
138#undef CONFIG_CMD_NFS /* NFS support */
139
140#define CONFIG_SYS_NO_FLASH
Tom Rix0297ec72009-09-29 10:19:49 -0400141#define CONFIG_HARD_I2C 1
Dirk Behme7379f452009-01-28 21:40:16 +0100142#define CONFIG_SYS_I2C_SPEED 100000
143#define CONFIG_SYS_I2C_SLAVE 1
144#define CONFIG_SYS_I2C_BUS 0
145#define CONFIG_SYS_I2C_BUS_SELECT 1
146#define CONFIG_DRIVER_OMAP34XX_I2C 1
147
148/*
Tom Rixcd782632009-06-28 12:52:29 -0500149 * TWL4030
150 */
151#define CONFIG_TWL4030_POWER 1
Tom Rix2c155132009-06-28 12:52:30 -0500152#define CONFIG_TWL4030_LED 1
Tom Rixcd782632009-06-28 12:52:29 -0500153
154/*
Dirk Behme7379f452009-01-28 21:40:16 +0100155 * Board NAND Info.
156 */
157#define CONFIG_NAND_OMAP_GPMC
158#define CONFIG_SYS_NAND_ADDR NAND_BASE /* physical address */
159 /* to access nand */
160#define CONFIG_SYS_NAND_BASE NAND_BASE /* physical address */
161 /* to access nand at */
162 /* CS0 */
163#define GPMC_NAND_ECC_LP_x16_LAYOUT 1
164
165#define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of NAND */
166 /* devices */
Dirk Behme7379f452009-01-28 21:40:16 +0100167#define CONFIG_JFFS2_NAND
168/* nand device jffs2 lives on */
169#define CONFIG_JFFS2_DEV "nand0"
170/* start of jffs2 partition */
171#define CONFIG_JFFS2_PART_OFFSET 0x680000
172#define CONFIG_JFFS2_PART_SIZE 0xf980000 /* size of jffs2 */
173 /* partition */
174
175/* Environment information */
176#define CONFIG_BOOTDELAY 10
177
178#define CONFIG_EXTRA_ENV_SETTINGS \
179 "loadaddr=0x82000000\0" \
Tom Rix05be5a62009-10-31 12:37:42 -0500180 "usbtty=cdc_acm\0" \
Dirk Behme7379f452009-01-28 21:40:16 +0100181 "console=ttyS2,115200n8\0" \
Tom Rinid6906cb2011-09-03 21:50:35 -0400182 "mmcdev=0\0" \
Dirk Behme7379f452009-01-28 21:40:16 +0100183 "videomode=1024x768@60,vxres=1024,vyres=768\0" \
184 "videospec=omapfb:vram:2M,vram:4M\0" \
185 "mmcargs=setenv bootargs console=${console} " \
186 "video=${videospec},mode:${videomode} " \
187 "root=/dev/mmcblk0p2 rw " \
188 "rootfstype=ext3 rootwait\0" \
189 "nandargs=setenv bootargs console=${console} " \
190 "video=${videospec},mode:${videomode} " \
191 "root=/dev/mtdblock4 rw " \
192 "rootfstype=jffs2\0" \
Tom Rinid6906cb2011-09-03 21:50:35 -0400193 "loadbootscript=fatload mmc ${mmcdev} ${loadaddr} boot.scr\0" \
Dirk Behme7379f452009-01-28 21:40:16 +0100194 "bootscript=echo Running bootscript from mmc ...; " \
Wolfgang Denk74de7ae2009-04-01 23:34:12 +0200195 "source ${loadaddr}\0" \
Tom Rinid6906cb2011-09-03 21:50:35 -0400196 "loaduimage=fatload mmc ${mmcdev} ${loadaddr} uImage\0" \
Dirk Behme7379f452009-01-28 21:40:16 +0100197 "mmcboot=echo Booting from mmc ...; " \
198 "run mmcargs; " \
199 "bootm ${loadaddr}\0" \
200 "nandboot=echo Booting from nand ...; " \
201 "run nandargs; " \
202 "nand read ${loadaddr} 280000 400000; " \
203 "bootm ${loadaddr}\0" \
204
205#define CONFIG_BOOTCOMMAND \
Tom Rinid6906cb2011-09-03 21:50:35 -0400206 "if mmc rescan ${mmcdev}; then " \
Dirk Behme7379f452009-01-28 21:40:16 +0100207 "if run loadbootscript; then " \
208 "run bootscript; " \
209 "else " \
210 "if run loaduimage; then " \
211 "run mmcboot; " \
212 "else run nandboot; " \
213 "fi; " \
214 "fi; " \
215 "else run nandboot; fi"
216
217#define CONFIG_AUTO_COMPLETE 1
218/*
219 * Miscellaneous configurable options
220 */
Dirk Behme7379f452009-01-28 21:40:16 +0100221#define CONFIG_SYS_LONGHELP /* undef to save memory */
222#define CONFIG_SYS_HUSH_PARSER /* use "hush" command parser */
223#define CONFIG_SYS_PROMPT_HUSH_PS2 "> "
Robert P. J. Day1270ec12009-12-12 12:10:33 -0500224#define CONFIG_SYS_PROMPT "OMAP3 Zoom1 # "
Vaibhav Hiremathf62b1252011-09-03 21:24:19 -0400225#define CONFIG_SYS_CBSIZE 512 /* Console I/O Buffer Size */
Dirk Behme7379f452009-01-28 21:40:16 +0100226/* Print Buffer Size */
227#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
228 sizeof(CONFIG_SYS_PROMPT) + 16)
229#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
230/* Boot Argument Buffer Size */
231#define CONFIG_SYS_BARGSIZE (CONFIG_SYS_CBSIZE)
232
233#define CONFIG_SYS_MEMTEST_START (OMAP34XX_SDRC_CS0) /* memtest */
234 /* works on */
235#define CONFIG_SYS_MEMTEST_END (OMAP34XX_SDRC_CS0 + \
236 0x01F00000) /* 31MB */
237
Dirk Behme7379f452009-01-28 21:40:16 +0100238#define CONFIG_SYS_LOAD_ADDR (OMAP34XX_SDRC_CS0) /* default */
239 /* load address */
240
Dirk Behme25435c62010-11-30 11:10:45 -0500241#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
242#define CONFIG_SYS_INIT_RAM_ADDR 0x4020f800
243#define CONFIG_SYS_INIT_RAM_SIZE 0x800
244#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \
245 CONFIG_SYS_INIT_RAM_SIZE - \
246 GENERATED_GBL_DATA_SIZE)
Dirk Behme7379f452009-01-28 21:40:16 +0100247/*
Manikandan Pillaid3a513c2009-04-21 17:29:05 +0200248 * OMAP3 has 12 GP timers, they can be driven by the system clock
249 * (12/13/16.8/19.2/38.4MHz) or by 32KHz clock. We use 13MHz (V_SCLK).
250 * This rate is divided by a local divisor.
Dirk Behme7379f452009-01-28 21:40:16 +0100251 */
Manikandan Pillaid3a513c2009-04-21 17:29:05 +0200252#define CONFIG_SYS_TIMERBASE OMAP34XX_GPT2
253#define CONFIG_SYS_PTV 2 /* Divisor: 2^(PTV+1) => 8 */
254#define CONFIG_SYS_HZ 1000
Dirk Behme7379f452009-01-28 21:40:16 +0100255
256/*-----------------------------------------------------------------------
257 * Stack sizes
258 *
259 * The stack sizes are set up in start.S using the settings below
260 */
Sandeep Paulraj9c44ddc2009-09-09 11:50:40 -0400261#define CONFIG_STACKSIZE (128 << 10) /* regular stack 128 KiB */
Dirk Behme7379f452009-01-28 21:40:16 +0100262#ifdef CONFIG_USE_IRQ
Sandeep Paulraj9c44ddc2009-09-09 11:50:40 -0400263#define CONFIG_STACKSIZE_IRQ (4 << 10) /* IRQ stack 4 KiB */
264#define CONFIG_STACKSIZE_FIQ (4 << 10) /* FIQ stack 4 KiB */
Dirk Behme7379f452009-01-28 21:40:16 +0100265#endif
266
267/*-----------------------------------------------------------------------
268 * Physical Memory Map
269 */
270#define CONFIG_NR_DRAM_BANKS 2 /* CS1 may or may not be populated */
271#define PHYS_SDRAM_1 OMAP34XX_SDRC_CS0
Sandeep Paulraj9c44ddc2009-09-09 11:50:40 -0400272#define PHYS_SDRAM_1_SIZE (32 << 20) /* at least 32 MiB */
Dirk Behme7379f452009-01-28 21:40:16 +0100273#define PHYS_SDRAM_2 OMAP34XX_SDRC_CS1
274
275/* SDRAM Bank Allocation method */
276#define SDRC_R_B_C 1
277
278/*-----------------------------------------------------------------------
279 * FLASH and environment organization
280 */
281
282/* **** PISMO SUPPORT *** */
283
284/* Configure the PISMO */
285#define PISMO1_NAND_SIZE GPMC_SIZE_128M
286#define PISMO1_ONEN_SIZE GPMC_SIZE_128M
287
Sandeep Paulraj9c44ddc2009-09-09 11:50:40 -0400288#define CONFIG_SYS_MONITOR_LEN (256 << 10) /* Reserve 2 sectors */
Dirk Behme7379f452009-01-28 21:40:16 +0100289
Luca Ceresoli6cbec7b2011-04-20 11:02:05 -0400290#if defined(CONFIG_CMD_NAND)
291#define CONFIG_SYS_FLASH_BASE PISMO1_NAND_BASE
292#endif
Dirk Behme7379f452009-01-28 21:40:16 +0100293
294/* Monitor at start of flash */
295#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE
296#define CONFIG_SYS_ONENAND_BASE ONENAND_MAP
297
298#define CONFIG_ENV_IS_IN_NAND 1
299#define ONENAND_ENV_OFFSET 0x260000 /* environment starts here */
300#define SMNAND_ENV_OFFSET 0x260000 /* environment starts here */
301
Luca Ceresoli6cbec7b2011-04-20 11:02:05 -0400302#define CONFIG_SYS_ENV_SECT_SIZE (128 << 10) /* 128 KiB */
303#define CONFIG_ENV_OFFSET SMNAND_ENV_OFFSET
Dirk Behme7379f452009-01-28 21:40:16 +0100304#define CONFIG_ENV_ADDR SMNAND_ENV_OFFSET
305
Dirk Behme7379f452009-01-28 21:40:16 +0100306#endif /* __CONFIG_H */