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Tom Rini83d290c2018-05-06 17:58:06 -04001// SPDX-License-Identifier: GPL-2.0+
wdenk43d96162003-03-06 00:02:04 +00002/*
3 * (C) Copyright 2000
4 * Paolo Scaffardi, AIRVENT SAM s.p.a - RIMINI(ITALY), arsenio@tin.it
5 *
6 * (C) Copyright 2000 Sysgo Real-Time Solutions, GmbH <www.elinos.com>
7 * Marius Groeger <mgroeger@sysgo.de>
8 *
9 * (C) Copyright 2003 Pengutronix e.K.
10 * Robert Schwebel <r.schwebel@pengutronix.de>
11 *
Lei Wen3df619e2011-04-13 23:48:31 +053012 * (C) Copyright 2011 Marvell Inc.
13 * Lei Wen <leiwen@marvell.com>
14 *
wdenk43d96162003-03-06 00:02:04 +000015 * Back ported to the 8xx platform (from the 8260 platform) by
16 * Murray.Jensen@cmst.csiro.au, 27-Jan-01.
17 */
18
wdenk43d96162003-03-06 00:02:04 +000019#include <common.h>
Stefan Roese0c0f7192016-09-16 15:07:52 +020020#include <dm.h>
wdenk43d96162003-03-06 00:02:04 +000021#include <i2c.h>
Simon Glassf7ae49f2020-05-10 11:40:05 -060022#include <log.h>
Stefan Roese7b46ee52016-09-16 15:07:51 +020023#include <asm/io.h>
Simon Glassc05ed002020-05-10 11:40:11 -060024#include <linux/delay.h>
Lei Wen3df619e2011-04-13 23:48:31 +053025#include "mv_i2c.h"
wdenk43d96162003-03-06 00:02:04 +000026
wdenk43d96162003-03-06 00:02:04 +000027/* All transfers are described by this data structure */
Simon Glassfffff722015-02-05 21:41:33 -070028struct mv_i2c_msg {
wdenk43d96162003-03-06 00:02:04 +000029 u8 condition;
wdenk8bde7f72003-06-27 21:31:46 +000030 u8 acknack;
31 u8 direction;
wdenk43d96162003-03-06 00:02:04 +000032 u8 data;
33};
34
Stefan Roese0c0f7192016-09-16 15:07:52 +020035#ifdef CONFIG_ARMADA_3700
36/* Armada 3700 has no padding between the registers */
37struct mv_i2c {
38 u32 ibmr;
39 u32 idbr;
40 u32 icr;
41 u32 isr;
42 u32 isar;
43};
44#else
Lei Wen3df619e2011-04-13 23:48:31 +053045struct mv_i2c {
46 u32 ibmr;
47 u32 pad0;
48 u32 idbr;
49 u32 pad1;
50 u32 icr;
51 u32 pad2;
52 u32 isr;
53 u32 pad3;
54 u32 isar;
55};
Stefan Roese0c0f7192016-09-16 15:07:52 +020056#endif
57
58/*
59 * Dummy implementation that can be overwritten by a board
60 * specific function
61 */
62__weak void i2c_clk_enable(void)
63{
64}
Lei Wen3df619e2011-04-13 23:48:31 +053065
Lei Wen68432c22011-04-13 23:48:16 +053066/*
Lei Wen3df619e2011-04-13 23:48:31 +053067 * i2c_reset: - reset the host controller
wdenk43d96162003-03-06 00:02:04 +000068 *
69 */
Stefan Roese7b46ee52016-09-16 15:07:51 +020070static void i2c_reset(struct mv_i2c *base)
wdenk43d96162003-03-06 00:02:04 +000071{
Stefan Roese9ad5a002016-09-16 15:07:53 +020072 u32 icr_mode;
73
74 /* Save bus mode (standard or fast speed) for later use */
75 icr_mode = readl(&base->icr) & ICR_MODE_MASK;
Lei Wen3df619e2011-04-13 23:48:31 +053076 writel(readl(&base->icr) & ~ICR_IUE, &base->icr); /* disable unit */
77 writel(readl(&base->icr) | ICR_UR, &base->icr); /* reset the unit */
wdenk8bde7f72003-06-27 21:31:46 +000078 udelay(100);
Lei Wen3df619e2011-04-13 23:48:31 +053079 writel(readl(&base->icr) & ~ICR_IUE, &base->icr); /* disable unit */
80
81 i2c_clk_enable();
82
Tom Rinia5752f82021-08-18 23:12:32 -040083 writel(0x0, &base->isar); /* set our slave address */
Stefan Roese9ad5a002016-09-16 15:07:53 +020084 /* set control reg values */
85 writel(I2C_ICR_INIT | icr_mode, &base->icr);
Lei Wen3df619e2011-04-13 23:48:31 +053086 writel(I2C_ISR_INIT, &base->isr); /* set clear interrupt bits */
87 writel(readl(&base->icr) | ICR_IUE, &base->icr); /* enable unit */
wdenk8bde7f72003-06-27 21:31:46 +000088 udelay(100);
wdenk43d96162003-03-06 00:02:04 +000089}
90
Lei Wen68432c22011-04-13 23:48:16 +053091/*
wdenk8bde7f72003-06-27 21:31:46 +000092 * i2c_isr_set_cleared: - wait until certain bits of the I2C status register
wdenk43d96162003-03-06 00:02:04 +000093 * are set and cleared
94 *
Markus Klotzbuecherba70d6a2006-03-24 12:23:27 +010095 * @return: 1 in case of success, 0 means timeout (no match within 10 ms).
wdenk43d96162003-03-06 00:02:04 +000096 */
Stefan Roese7b46ee52016-09-16 15:07:51 +020097static int i2c_isr_set_cleared(struct mv_i2c *base, unsigned long set_mask,
Lei Wen68432c22011-04-13 23:48:16 +053098 unsigned long cleared_mask)
wdenk43d96162003-03-06 00:02:04 +000099{
Lei Wen3df619e2011-04-13 23:48:31 +0530100 int timeout = 1000, isr;
wdenk43d96162003-03-06 00:02:04 +0000101
Lei Wen3df619e2011-04-13 23:48:31 +0530102 do {
103 isr = readl(&base->isr);
Lei Wen68432c22011-04-13 23:48:16 +0530104 udelay(10);
105 if (timeout-- < 0)
106 return 0;
Lei Wen3df619e2011-04-13 23:48:31 +0530107 } while (((isr & set_mask) != set_mask)
108 || ((isr & cleared_mask) != 0));
wdenk43d96162003-03-06 00:02:04 +0000109
wdenk8bde7f72003-06-27 21:31:46 +0000110 return 1;
wdenk43d96162003-03-06 00:02:04 +0000111}
112
Lei Wen68432c22011-04-13 23:48:16 +0530113/*
wdenk43d96162003-03-06 00:02:04 +0000114 * i2c_transfer: - Transfer one byte over the i2c bus
115 *
wdenk8bde7f72003-06-27 21:31:46 +0000116 * This function can tranfer a byte over the i2c bus in both directions.
117 * It is used by the public API functions.
wdenk43d96162003-03-06 00:02:04 +0000118 *
119 * @return: 0: transfer successful
120 * -1: message is empty
121 * -2: transmit timeout
122 * -3: ACK missing
123 * -4: receive timeout
124 * -5: illegal parameters
125 * -6: bus is busy and couldn't be aquired
wdenk8bde7f72003-06-27 21:31:46 +0000126 */
Stefan Roese7b46ee52016-09-16 15:07:51 +0200127static int i2c_transfer(struct mv_i2c *base, struct mv_i2c_msg *msg)
wdenk43d96162003-03-06 00:02:04 +0000128{
129 int ret;
130
wdenk8bde7f72003-06-27 21:31:46 +0000131 if (!msg)
wdenk43d96162003-03-06 00:02:04 +0000132 goto transfer_error_msg_empty;
133
Lei Wen68432c22011-04-13 23:48:16 +0530134 switch (msg->direction) {
wdenk43d96162003-03-06 00:02:04 +0000135 case I2C_WRITE:
wdenk43d96162003-03-06 00:02:04 +0000136 /* check if bus is not busy */
Stefan Roese7b46ee52016-09-16 15:07:51 +0200137 if (!i2c_isr_set_cleared(base, 0, ISR_IBB))
wdenk43d96162003-03-06 00:02:04 +0000138 goto transfer_error_bus_busy;
139
140 /* start transmission */
Lei Wen3df619e2011-04-13 23:48:31 +0530141 writel(readl(&base->icr) & ~ICR_START, &base->icr);
142 writel(readl(&base->icr) & ~ICR_STOP, &base->icr);
143 writel(msg->data, &base->idbr);
Marek Vasut3ba8bf72010-09-09 09:50:39 +0200144 if (msg->condition == I2C_COND_START)
Lei Wen3df619e2011-04-13 23:48:31 +0530145 writel(readl(&base->icr) | ICR_START, &base->icr);
Marek Vasut3ba8bf72010-09-09 09:50:39 +0200146 if (msg->condition == I2C_COND_STOP)
Lei Wen3df619e2011-04-13 23:48:31 +0530147 writel(readl(&base->icr) | ICR_STOP, &base->icr);
Marek Vasut3ba8bf72010-09-09 09:50:39 +0200148 if (msg->acknack == I2C_ACKNAK_SENDNAK)
Lei Wen3df619e2011-04-13 23:48:31 +0530149 writel(readl(&base->icr) | ICR_ACKNAK, &base->icr);
Marek Vasut3ba8bf72010-09-09 09:50:39 +0200150 if (msg->acknack == I2C_ACKNAK_SENDACK)
Lei Wen3df619e2011-04-13 23:48:31 +0530151 writel(readl(&base->icr) & ~ICR_ACKNAK, &base->icr);
152 writel(readl(&base->icr) & ~ICR_ALDIE, &base->icr);
153 writel(readl(&base->icr) | ICR_TB, &base->icr);
wdenk43d96162003-03-06 00:02:04 +0000154
155 /* transmit register empty? */
Stefan Roese7b46ee52016-09-16 15:07:51 +0200156 if (!i2c_isr_set_cleared(base, ISR_ITE, 0))
wdenk43d96162003-03-06 00:02:04 +0000157 goto transfer_error_transmit_timeout;
158
159 /* clear 'transmit empty' state */
Lei Wen3df619e2011-04-13 23:48:31 +0530160 writel(readl(&base->isr) | ISR_ITE, &base->isr);
wdenk43d96162003-03-06 00:02:04 +0000161
162 /* wait for ACK from slave */
163 if (msg->acknack == I2C_ACKNAK_WAITACK)
Stefan Roese7b46ee52016-09-16 15:07:51 +0200164 if (!i2c_isr_set_cleared(base, 0, ISR_ACKNAK))
wdenk43d96162003-03-06 00:02:04 +0000165 goto transfer_error_ack_missing;
166 break;
167
168 case I2C_READ:
169
170 /* check if bus is not busy */
Stefan Roese7b46ee52016-09-16 15:07:51 +0200171 if (!i2c_isr_set_cleared(base, 0, ISR_IBB))
wdenk43d96162003-03-06 00:02:04 +0000172 goto transfer_error_bus_busy;
173
174 /* start receive */
Lei Wen3df619e2011-04-13 23:48:31 +0530175 writel(readl(&base->icr) & ~ICR_START, &base->icr);
176 writel(readl(&base->icr) & ~ICR_STOP, &base->icr);
Marek Vasut3ba8bf72010-09-09 09:50:39 +0200177 if (msg->condition == I2C_COND_START)
Lei Wen3df619e2011-04-13 23:48:31 +0530178 writel(readl(&base->icr) | ICR_START, &base->icr);
Marek Vasut3ba8bf72010-09-09 09:50:39 +0200179 if (msg->condition == I2C_COND_STOP)
Lei Wen3df619e2011-04-13 23:48:31 +0530180 writel(readl(&base->icr) | ICR_STOP, &base->icr);
Marek Vasut3ba8bf72010-09-09 09:50:39 +0200181 if (msg->acknack == I2C_ACKNAK_SENDNAK)
Lei Wen3df619e2011-04-13 23:48:31 +0530182 writel(readl(&base->icr) | ICR_ACKNAK, &base->icr);
Marek Vasut3ba8bf72010-09-09 09:50:39 +0200183 if (msg->acknack == I2C_ACKNAK_SENDACK)
Lei Wen3df619e2011-04-13 23:48:31 +0530184 writel(readl(&base->icr) & ~ICR_ACKNAK, &base->icr);
185 writel(readl(&base->icr) & ~ICR_ALDIE, &base->icr);
186 writel(readl(&base->icr) | ICR_TB, &base->icr);
wdenk43d96162003-03-06 00:02:04 +0000187
188 /* receive register full? */
Stefan Roese7b46ee52016-09-16 15:07:51 +0200189 if (!i2c_isr_set_cleared(base, ISR_IRF, 0))
wdenk8bde7f72003-06-27 21:31:46 +0000190 goto transfer_error_receive_timeout;
wdenk43d96162003-03-06 00:02:04 +0000191
Lei Wen3df619e2011-04-13 23:48:31 +0530192 msg->data = readl(&base->idbr);
wdenk43d96162003-03-06 00:02:04 +0000193
194 /* clear 'receive empty' state */
Lei Wen3df619e2011-04-13 23:48:31 +0530195 writel(readl(&base->isr) | ISR_IRF, &base->isr);
wdenk43d96162003-03-06 00:02:04 +0000196 break;
wdenk43d96162003-03-06 00:02:04 +0000197 default:
wdenk43d96162003-03-06 00:02:04 +0000198 goto transfer_error_illegal_param;
wdenk43d96162003-03-06 00:02:04 +0000199 }
200
wdenk8bde7f72003-06-27 21:31:46 +0000201 return 0;
wdenk43d96162003-03-06 00:02:04 +0000202
wdenk8bde7f72003-06-27 21:31:46 +0000203transfer_error_msg_empty:
Stefan Roese8eff9092016-09-16 15:07:49 +0200204 debug("i2c_transfer: error: 'msg' is empty\n");
205 ret = -1;
206 goto i2c_transfer_finish;
wdenk43d96162003-03-06 00:02:04 +0000207
208transfer_error_transmit_timeout:
Stefan Roese8eff9092016-09-16 15:07:49 +0200209 debug("i2c_transfer: error: transmit timeout\n");
210 ret = -2;
211 goto i2c_transfer_finish;
wdenk43d96162003-03-06 00:02:04 +0000212
213transfer_error_ack_missing:
Stefan Roese8eff9092016-09-16 15:07:49 +0200214 debug("i2c_transfer: error: ACK missing\n");
215 ret = -3;
216 goto i2c_transfer_finish;
wdenk43d96162003-03-06 00:02:04 +0000217
218transfer_error_receive_timeout:
Stefan Roese8eff9092016-09-16 15:07:49 +0200219 debug("i2c_transfer: error: receive timeout\n");
220 ret = -4;
221 goto i2c_transfer_finish;
wdenk43d96162003-03-06 00:02:04 +0000222
223transfer_error_illegal_param:
Stefan Roese8eff9092016-09-16 15:07:49 +0200224 debug("i2c_transfer: error: illegal parameters\n");
225 ret = -5;
226 goto i2c_transfer_finish;
wdenk43d96162003-03-06 00:02:04 +0000227
228transfer_error_bus_busy:
Stefan Roese8eff9092016-09-16 15:07:49 +0200229 debug("i2c_transfer: error: bus is busy\n");
230 ret = -6;
231 goto i2c_transfer_finish;
wdenk43d96162003-03-06 00:02:04 +0000232
233i2c_transfer_finish:
Stefan Roese8eff9092016-09-16 15:07:49 +0200234 debug("i2c_transfer: ISR: 0x%04x\n", readl(&base->isr));
Stefan Roese7b46ee52016-09-16 15:07:51 +0200235 i2c_reset(base);
Stefan Roese8eff9092016-09-16 15:07:49 +0200236 return ret;
wdenk43d96162003-03-06 00:02:04 +0000237}
238
Stefan Roese0c0f7192016-09-16 15:07:52 +0200239static int __i2c_read(struct mv_i2c *base, uchar chip, u8 *addr, int alen,
Stefan Roese7b46ee52016-09-16 15:07:51 +0200240 uchar *buffer, int len)
wdenk43d96162003-03-06 00:02:04 +0000241{
Simon Glassfffff722015-02-05 21:41:33 -0700242 struct mv_i2c_msg msg;
wdenk43d96162003-03-06 00:02:04 +0000243
Stefan Roese8eff9092016-09-16 15:07:49 +0200244 debug("i2c_read(chip=0x%02x, addr=0x%02x, alen=0x%02x, "
Stefan Roese0c0f7192016-09-16 15:07:52 +0200245 "len=0x%02x)\n", chip, *addr, alen, len);
wdenk43d96162003-03-06 00:02:04 +0000246
jinghua85f03f02016-09-16 15:07:54 +0200247 if (len == 0) {
248 printf("reading zero byte is invalid\n");
249 return -EINVAL;
250 }
251
Stefan Roese7b46ee52016-09-16 15:07:51 +0200252 i2c_reset(base);
wdenk43d96162003-03-06 00:02:04 +0000253
254 /* dummy chip address write */
Stefan Roese8eff9092016-09-16 15:07:49 +0200255 debug("i2c_read: dummy chip address write\n");
wdenk43d96162003-03-06 00:02:04 +0000256 msg.condition = I2C_COND_START;
257 msg.acknack = I2C_ACKNAK_WAITACK;
258 msg.direction = I2C_WRITE;
Lei Wen68432c22011-04-13 23:48:16 +0530259 msg.data = (chip << 1);
260 msg.data &= 0xFE;
Stefan Roese7b46ee52016-09-16 15:07:51 +0200261 if (i2c_transfer(base, &msg))
Lei Wen68432c22011-04-13 23:48:16 +0530262 return -1;
wdenk8bde7f72003-06-27 21:31:46 +0000263
wdenk43d96162003-03-06 00:02:04 +0000264 /*
wdenk8bde7f72003-06-27 21:31:46 +0000265 * send memory address bytes;
266 * alen defines how much bytes we have to send.
wdenk43d96162003-03-06 00:02:04 +0000267 */
wdenk43d96162003-03-06 00:02:04 +0000268 while (--alen >= 0) {
Stefan Roese0c0f7192016-09-16 15:07:52 +0200269 debug("i2c_read: send address byte %02x (alen=%d)\n",
270 *addr, alen);
wdenk43d96162003-03-06 00:02:04 +0000271 msg.condition = I2C_COND_NORMAL;
272 msg.acknack = I2C_ACKNAK_WAITACK;
273 msg.direction = I2C_WRITE;
Bradley Bolen77466262016-12-13 12:49:53 -0500274 msg.data = addr[alen];
Stefan Roese7b46ee52016-09-16 15:07:51 +0200275 if (i2c_transfer(base, &msg))
Lei Wen68432c22011-04-13 23:48:16 +0530276 return -1;
wdenk43d96162003-03-06 00:02:04 +0000277 }
wdenk8bde7f72003-06-27 21:31:46 +0000278
wdenk43d96162003-03-06 00:02:04 +0000279 /* start read sequence */
Stefan Roese8eff9092016-09-16 15:07:49 +0200280 debug("i2c_read: start read sequence\n");
wdenk43d96162003-03-06 00:02:04 +0000281 msg.condition = I2C_COND_START;
282 msg.acknack = I2C_ACKNAK_WAITACK;
283 msg.direction = I2C_WRITE;
284 msg.data = (chip << 1);
285 msg.data |= 0x01;
Stefan Roese7b46ee52016-09-16 15:07:51 +0200286 if (i2c_transfer(base, &msg))
Lei Wen68432c22011-04-13 23:48:16 +0530287 return -1;
wdenk43d96162003-03-06 00:02:04 +0000288
289 /* read bytes; send NACK at last byte */
290 while (len--) {
Lei Wen68432c22011-04-13 23:48:16 +0530291 if (len == 0) {
wdenk43d96162003-03-06 00:02:04 +0000292 msg.condition = I2C_COND_STOP;
293 msg.acknack = I2C_ACKNAK_SENDNAK;
294 } else {
295 msg.condition = I2C_COND_NORMAL;
296 msg.acknack = I2C_ACKNAK_SENDACK;
297 }
298
299 msg.direction = I2C_READ;
300 msg.data = 0x00;
Stefan Roese7b46ee52016-09-16 15:07:51 +0200301 if (i2c_transfer(base, &msg))
Lei Wen68432c22011-04-13 23:48:16 +0530302 return -1;
wdenk43d96162003-03-06 00:02:04 +0000303
Markus Klotzbuecherba70d6a2006-03-24 12:23:27 +0100304 *buffer = msg.data;
Stefan Roese0c0f7192016-09-16 15:07:52 +0200305 debug("i2c_read: reading byte (%p)=0x%02x\n",
306 buffer, *buffer);
Markus Klotzbuecherba70d6a2006-03-24 12:23:27 +0100307 buffer++;
wdenk43d96162003-03-06 00:02:04 +0000308 }
309
Stefan Roese7b46ee52016-09-16 15:07:51 +0200310 i2c_reset(base);
wdenk43d96162003-03-06 00:02:04 +0000311
312 return 0;
313}
314
Stefan Roese0c0f7192016-09-16 15:07:52 +0200315static int __i2c_write(struct mv_i2c *base, uchar chip, u8 *addr, int alen,
Stefan Roese7b46ee52016-09-16 15:07:51 +0200316 uchar *buffer, int len)
wdenk43d96162003-03-06 00:02:04 +0000317{
Simon Glassfffff722015-02-05 21:41:33 -0700318 struct mv_i2c_msg msg;
wdenk43d96162003-03-06 00:02:04 +0000319
Stefan Roese8eff9092016-09-16 15:07:49 +0200320 debug("i2c_write(chip=0x%02x, addr=0x%02x, alen=0x%02x, "
Stefan Roese0c0f7192016-09-16 15:07:52 +0200321 "len=0x%02x)\n", chip, *addr, alen, len);
wdenk43d96162003-03-06 00:02:04 +0000322
Stefan Roese7b46ee52016-09-16 15:07:51 +0200323 i2c_reset(base);
wdenk43d96162003-03-06 00:02:04 +0000324
325 /* chip address write */
Stefan Roese8eff9092016-09-16 15:07:49 +0200326 debug("i2c_write: chip address write\n");
wdenk43d96162003-03-06 00:02:04 +0000327 msg.condition = I2C_COND_START;
328 msg.acknack = I2C_ACKNAK_WAITACK;
329 msg.direction = I2C_WRITE;
Lei Wen68432c22011-04-13 23:48:16 +0530330 msg.data = (chip << 1);
331 msg.data &= 0xFE;
Stefan Roese7b46ee52016-09-16 15:07:51 +0200332 if (i2c_transfer(base, &msg))
Lei Wen68432c22011-04-13 23:48:16 +0530333 return -1;
wdenk8bde7f72003-06-27 21:31:46 +0000334
wdenk43d96162003-03-06 00:02:04 +0000335 /*
wdenk8bde7f72003-06-27 21:31:46 +0000336 * send memory address bytes;
337 * alen defines how much bytes we have to send.
wdenk43d96162003-03-06 00:02:04 +0000338 */
wdenk43d96162003-03-06 00:02:04 +0000339 while (--alen >= 0) {
Stefan Roese0c0f7192016-09-16 15:07:52 +0200340 debug("i2c_read: send address byte %02x (alen=%d)\n",
341 *addr, alen);
wdenk43d96162003-03-06 00:02:04 +0000342 msg.condition = I2C_COND_NORMAL;
343 msg.acknack = I2C_ACKNAK_WAITACK;
344 msg.direction = I2C_WRITE;
Bradley Bolen77466262016-12-13 12:49:53 -0500345 msg.data = addr[alen];
Stefan Roese7b46ee52016-09-16 15:07:51 +0200346 if (i2c_transfer(base, &msg))
Lei Wen68432c22011-04-13 23:48:16 +0530347 return -1;
wdenk43d96162003-03-06 00:02:04 +0000348 }
wdenk8bde7f72003-06-27 21:31:46 +0000349
wdenk43d96162003-03-06 00:02:04 +0000350 /* write bytes; send NACK at last byte */
351 while (len--) {
Stefan Roese0c0f7192016-09-16 15:07:52 +0200352 debug("i2c_write: writing byte (%p)=0x%02x\n",
353 buffer, *buffer);
wdenk43d96162003-03-06 00:02:04 +0000354
Lei Wen68432c22011-04-13 23:48:16 +0530355 if (len == 0)
wdenk43d96162003-03-06 00:02:04 +0000356 msg.condition = I2C_COND_STOP;
357 else
358 msg.condition = I2C_COND_NORMAL;
359
360 msg.acknack = I2C_ACKNAK_WAITACK;
361 msg.direction = I2C_WRITE;
362 msg.data = *(buffer++);
wdenk8bde7f72003-06-27 21:31:46 +0000363
Stefan Roese7b46ee52016-09-16 15:07:51 +0200364 if (i2c_transfer(base, &msg))
Lei Wen68432c22011-04-13 23:48:16 +0530365 return -1;
wdenk43d96162003-03-06 00:02:04 +0000366 }
367
Stefan Roese7b46ee52016-09-16 15:07:51 +0200368 i2c_reset(base);
wdenk43d96162003-03-06 00:02:04 +0000369
370 return 0;
wdenk43d96162003-03-06 00:02:04 +0000371}
Stefan Roese7b46ee52016-09-16 15:07:51 +0200372
Igor Opaniuk2147a162021-02-09 13:52:45 +0200373#if !CONFIG_IS_ENABLED(DM_I2C)
Stefan Roese0c0f7192016-09-16 15:07:52 +0200374
Stefan Roese7b46ee52016-09-16 15:07:51 +0200375static struct mv_i2c *base_glob;
376
377static void i2c_board_init(struct mv_i2c *base)
378{
379#ifdef CONFIG_SYS_I2C_INIT_BOARD
380 u32 icr;
381 /*
382 * call board specific i2c bus reset routine before accessing the
383 * environment, which might be in a chip on that bus. For details
384 * about this problem see doc/I2C_Edge_Conditions.
385 *
386 * disable I2C controller first, otherwhise it thinks we want to
387 * talk to the slave port...
388 */
389 icr = readl(&base->icr);
390 writel(readl(&base->icr) & ~(ICR_SCLE | ICR_IUE), &base->icr);
391
392 i2c_init_board();
393
394 writel(icr, &base->icr);
395#endif
396}
397
398#ifdef CONFIG_I2C_MULTI_BUS
399static unsigned long i2c_regs[CONFIG_MV_I2C_NUM] = CONFIG_MV_I2C_REG;
400static unsigned int bus_initialized[CONFIG_MV_I2C_NUM];
401static unsigned int current_bus;
402
403int i2c_set_bus_num(unsigned int bus)
404{
405 if ((bus < 0) || (bus >= CONFIG_MV_I2C_NUM)) {
406 printf("Bad bus: %d\n", bus);
407 return -1;
408 }
409
410 base_glob = (struct mv_i2c *)i2c_regs[bus];
411 current_bus = bus;
412
413 if (!bus_initialized[current_bus]) {
414 i2c_board_init(base_glob);
415 bus_initialized[current_bus] = 1;
416 }
417
418 return 0;
419}
420
421unsigned int i2c_get_bus_num(void)
422{
423 return current_bus;
424}
425#endif
426
427/* API Functions */
428void i2c_init(int speed, int slaveaddr)
429{
Stefan Roese9ad5a002016-09-16 15:07:53 +0200430 u32 val;
431
Stefan Roese7b46ee52016-09-16 15:07:51 +0200432#ifdef CONFIG_I2C_MULTI_BUS
433 current_bus = 0;
434 base_glob = (struct mv_i2c *)i2c_regs[current_bus];
435#else
436 base_glob = (struct mv_i2c *)CONFIG_MV_I2C_REG;
437#endif
438
Simon Glassf3d46152020-01-23 11:48:22 -0700439 if (speed > I2C_SPEED_STANDARD_RATE)
Stefan Roese9ad5a002016-09-16 15:07:53 +0200440 val = ICR_FM;
441 else
442 val = ICR_SM;
443 clrsetbits_le32(&base_glob->icr, ICR_MODE_MASK, val);
444
Stefan Roese7b46ee52016-09-16 15:07:51 +0200445 i2c_board_init(base_glob);
446}
447
Stefan Roese0c0f7192016-09-16 15:07:52 +0200448static int __i2c_probe_chip(struct mv_i2c *base, uchar chip)
449{
450 struct mv_i2c_msg msg;
451
452 i2c_reset(base);
453
454 msg.condition = I2C_COND_START;
455 msg.acknack = I2C_ACKNAK_WAITACK;
456 msg.direction = I2C_WRITE;
457 msg.data = (chip << 1) + 1;
458 if (i2c_transfer(base, &msg))
459 return -1;
460
461 msg.condition = I2C_COND_STOP;
462 msg.acknack = I2C_ACKNAK_SENDNAK;
463 msg.direction = I2C_READ;
464 msg.data = 0x00;
465 if (i2c_transfer(base, &msg))
466 return -1;
467
468 return 0;
469}
470
Stefan Roese7b46ee52016-09-16 15:07:51 +0200471/*
472 * i2c_probe: - Test if a chip answers for a given i2c address
473 *
474 * @chip: address of the chip which is searched for
475 * @return: 0 if a chip was found, -1 otherwhise
476 */
477int i2c_probe(uchar chip)
478{
479 return __i2c_probe_chip(base_glob, chip);
480}
481
482/*
483 * i2c_read: - Read multiple bytes from an i2c device
484 *
485 * The higher level routines take into account that this function is only
486 * called with len < page length of the device (see configuration file)
487 *
488 * @chip: address of the chip which is to be read
489 * @addr: i2c data address within the chip
490 * @alen: length of the i2c data address (1..2 bytes)
491 * @buffer: where to write the data
492 * @len: how much byte do we want to read
493 * @return: 0 in case of success
494 */
495int i2c_read(uchar chip, uint addr, int alen, uchar *buffer, int len)
496{
Stefan Roese0c0f7192016-09-16 15:07:52 +0200497 u8 addr_bytes[4];
498
499 addr_bytes[0] = (addr >> 0) & 0xFF;
500 addr_bytes[1] = (addr >> 8) & 0xFF;
501 addr_bytes[2] = (addr >> 16) & 0xFF;
502 addr_bytes[3] = (addr >> 24) & 0xFF;
503
504 return __i2c_read(base_glob, chip, addr_bytes, alen, buffer, len);
Stefan Roese7b46ee52016-09-16 15:07:51 +0200505}
506
507/*
508 * i2c_write: - Write multiple bytes to an i2c device
509 *
510 * The higher level routines take into account that this function is only
511 * called with len < page length of the device (see configuration file)
512 *
513 * @chip: address of the chip which is to be written
514 * @addr: i2c data address within the chip
515 * @alen: length of the i2c data address (1..2 bytes)
516 * @buffer: where to find the data to be written
517 * @len: how much byte do we want to read
518 * @return: 0 in case of success
519 */
520int i2c_write(uchar chip, uint addr, int alen, uchar *buffer, int len)
521{
Stefan Roese0c0f7192016-09-16 15:07:52 +0200522 u8 addr_bytes[4];
523
524 addr_bytes[0] = (addr >> 0) & 0xFF;
525 addr_bytes[1] = (addr >> 8) & 0xFF;
526 addr_bytes[2] = (addr >> 16) & 0xFF;
527 addr_bytes[3] = (addr >> 24) & 0xFF;
528
529 return __i2c_write(base_glob, chip, addr_bytes, alen, buffer, len);
Stefan Roese7b46ee52016-09-16 15:07:51 +0200530}
Stefan Roese0c0f7192016-09-16 15:07:52 +0200531
532#else /* CONFIG_DM_I2C */
533
534struct mv_i2c_priv {
535 struct mv_i2c *base;
536};
537
538static int mv_i2c_xfer(struct udevice *bus, struct i2c_msg *msg, int nmsgs)
539{
540 struct mv_i2c_priv *i2c = dev_get_priv(bus);
541 struct i2c_msg *dmsg, *omsg, dummy;
542
543 memset(&dummy, 0, sizeof(struct i2c_msg));
544
545 /*
546 * We expect either two messages (one with an offset and one with the
547 * actual data) or one message (just data or offset/data combined)
548 */
549 if (nmsgs > 2 || nmsgs == 0) {
550 debug("%s: Only one or two messages are supported.", __func__);
551 return -1;
552 }
553
554 omsg = nmsgs == 1 ? &dummy : msg;
555 dmsg = nmsgs == 1 ? msg : msg + 1;
556
557 if (dmsg->flags & I2C_M_RD)
558 return __i2c_read(i2c->base, dmsg->addr, omsg->buf,
559 omsg->len, dmsg->buf, dmsg->len);
560 else
561 return __i2c_write(i2c->base, dmsg->addr, omsg->buf,
562 omsg->len, dmsg->buf, dmsg->len);
563}
564
Stefan Roese9ad5a002016-09-16 15:07:53 +0200565static int mv_i2c_set_bus_speed(struct udevice *bus, unsigned int speed)
566{
567 struct mv_i2c_priv *priv = dev_get_priv(bus);
568 u32 val;
569
Simon Glassf3d46152020-01-23 11:48:22 -0700570 if (speed > I2C_SPEED_STANDARD_RATE)
Stefan Roese9ad5a002016-09-16 15:07:53 +0200571 val = ICR_FM;
572 else
573 val = ICR_SM;
574 clrsetbits_le32(&priv->base->icr, ICR_MODE_MASK, val);
575
576 return 0;
577}
578
Stefan Roese0c0f7192016-09-16 15:07:52 +0200579static int mv_i2c_probe(struct udevice *bus)
580{
581 struct mv_i2c_priv *priv = dev_get_priv(bus);
582
Masahiro Yamada702e57e2020-08-04 14:14:43 +0900583 priv->base = dev_read_addr_ptr(bus);
Stefan Roese0c0f7192016-09-16 15:07:52 +0200584
585 return 0;
586}
587
588static const struct dm_i2c_ops mv_i2c_ops = {
589 .xfer = mv_i2c_xfer,
Stefan Roese9ad5a002016-09-16 15:07:53 +0200590 .set_bus_speed = mv_i2c_set_bus_speed,
Stefan Roese0c0f7192016-09-16 15:07:52 +0200591};
592
593static const struct udevice_id mv_i2c_ids[] = {
594 { .compatible = "marvell,armada-3700-i2c" },
595 { }
596};
597
598U_BOOT_DRIVER(i2c_mv) = {
599 .name = "i2c_mv",
600 .id = UCLASS_I2C,
601 .of_match = mv_i2c_ids,
602 .probe = mv_i2c_probe,
Simon Glass41575d82020-12-03 16:55:17 -0700603 .priv_auto = sizeof(struct mv_i2c_priv),
Stefan Roese0c0f7192016-09-16 15:07:52 +0200604 .ops = &mv_i2c_ops,
605};
606#endif /* CONFIG_DM_I2C */